scholarly journals MAS: Maximum Energy-Aware Sense Amplifier Link for Asynchronous Network on Chip

2021 ◽  
Author(s):  
Erulappan Sakthivel ◽  
Rengaraj Madavan

A real-time multiprocessor chip model is also called a Network-on-Chip (NoC), and deals a promising architecture for future systems-on-chips. Even though a lot of Double Tail Sense Amplifiers are used in architectural approach, the existing DTSA with transceiver exhibits a difficulty of consuming more energy than its gouged design during various traffic condition. Novel Low Power pulse Triggered Flip Flop with DTSA is designed in this research to eliminate the difficulty. The Traffic Aware Sense amplifier MAS consists of Sense amplifiers (SA’s), Traffic Generator, and Estimator. Among various SA’S suitable (DTSA and NLPTF -DTSA) SA are selected and information transferred to the receiver. The performance of both DTSA with Transceiver and NLPTF-DTSA with transceiver compared under various traffic conditions. The proposed design (NLPTF-DTSA) is observed on TSMC 90 nm technology, showing 5.92 Gb/s data rate and 0.51 W total link power.

2016 ◽  
Vol 07 (03) ◽  
pp. 128-144 ◽  
Author(s):  
Erulappan Sakthivel ◽  
Veluchamy Malathi ◽  
Muruganantham Arunraja

2011 ◽  
Vol 57 (1) ◽  
pp. 61-68 ◽  
Author(s):  
Pooria M. Yaghini ◽  
Ashkan Eghbal ◽  
Hossein Pedram ◽  
Hamid Reza Zarandi

2013 ◽  
Vol 8 (S1) ◽  
pp. S72-S80
Author(s):  
Mohamed A. Abd El Ghany ◽  
Gursharan Reehal ◽  
Mohammed Ismail

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