AbstractA chain FeRAMTM is the best solution to realize high-speed and high-bandwidth nonvolatile RAM with low power dissipation. In this paper, the overview of chain FeRAM, the technical trend for FeRAM scaling and the marketing strategy are presented. First of all, the concept and performance of chain FeRAM are described. Secondly, the status and history of chain FeRAM development are presented. Thirdly, four kinds of scaling strategies for chain FeRAM are presented; (1) A shrink trend of chain cell including a capacitor plug shared with twin cells, and process techniques including Ir/TiAlN-barrier metal and MOCVD-PZT with SrRuO3 electrode, which are installed in 16Kb, 8Mb, 32Mb, 64Mb and 128Mb chain FeRAMs, (2) Capacitor damage suppression processes to reinforce step coverage and protect H2 damage even in 0.1μm2 capacitor of 128Mb, (3) A scalable array architecture such as an octal / quad bitline architecture to reduce bitline capacitance and ensure enough cell signal in scaled ferroelectric capacitor, and (4) A ferroelectric capacitor overdrive technique by driving shield-bitlines to enlarge tail-to-tail cell signal in low voltage operation of 1.3V. Fourthly, future direction of chain FeRAM is discussed. The vertical capacitor is one of candidates for gigabit-scale chain FeRAMs, and solves signal problem and achieves small 4F2 cell without contact formation. Finally, the marketing strategy to take full advantage of chain FeRAM is presented. A nonvolatile FeRAM cache is the promising candidate to achieve high bandwidth memory systems. Applications of chain FeRAM to solid-state drive (SSD) and hard-disk drive (HDD) and their system performance improvements are demonstrated.
A Fast ALU Design in CMOS for Low Voltage Operation
