Power Reduction in Punch-Through Current-Based Electro-Thermal Annealing in Gate-All-Around FETs

Device guidelines for reducing power with punch-through current annealing in gate-all-around (GAA) FETs were investigated based on three-dimensional (3D) simulations. We studied and compared how different geometric dimensions and materials of GAA FETs impact heat management when down-scaling. In order to maximize power efficiency during electro-thermal annealing (ETA), applying gate module engineering was more suitable than engineering the isolation or source drain modules.

Effects of Current Annealing on Thermal Conductivity of Carbon Nanotubes

This work documents the annealing effect on the thermal conductivity of nanotube film (CNTB) and carbon nanotube fiber (CNTF). The thermal properties of carbon nanotube samples are measured by using the transient electro-thermal (TET) technique, and the experimental phenomena are analyzed based on numerical simulation. During the current annealing treatment, CNTB1 always maintains the negative temperature coefficient of resistance (TCR), and its thermal diffusivity increases gradually. When the annealing current is 200 mA, it increases by 33.62%. However, with the increase of annealing current, the TCR of CNTB2 changes from positive to negative. The disparity between CNTB2 and CNTB1 suggests that they have different physical properties and even structures along their lengths. The high-level thermal diffusivity of CNTB2 and CNTF are 2.28–2.46 times and 1.65–3.85 times higher than the lower one. The results show that the decrease of the thermal diffusivity for CNTB2 and CNTF is mainly caused by enhanced Umklapp scattering, the high thermal resistance and torsional sliding during high temperature heating.