Design of ACS Architecture Using FinFET and CNTFET Devices for Low-Power Viterbi Decoder Using Asynchronous Techniques for Digital Communication Systems

Viterbi algorithm is the most popular algorithm used to decode the convolution code, but its computational complexity increases exponentially with the increasing constraint length due to a large number of Trellis transitions. However, high constraint length is necessary to improve the accuracy of the decoding process for the high rate convolution code. In particular, the Add-Compare-Select (ACS) module of the Viterbi Decoder will have large numbers of trellis states and trellis transitions with increased constraint lengths, which give rise to high hardware complexity and large power consumption. As the performance of the Viterbi decoder mainly depends on its efficient implementation of the ACS module, in the literature, several methods are presented for the implementation of ACS for the Viterbi decoder. The methods based on Precharge Half Buffer (PCHB) and Weak Conditioned Half Buffer, Shannon’s decomposition circuits, body-biased pseudo-NMOS logic and Quasi Delay Insensitive (QDI) timing model performance is analyzed. The methods are implemented using CMOS technology. In this paper, FinFET and CNTFET-based ACS implementation is performed. From the analysis, it has been found that the Carbon Nanotube-based implementation is better in performance when compared to the CMOS and FinFET technology. The proposed QDI model and retiming circuits for ACS block operate above 1[Formula: see text]GHz with high driving current and low power.

List Viterbi Decoding of PAC Codes

<div>Polarization-adjusted convolutional (PAC) codes are special concatenated codes in which we employ a one-to-one convolutional transform as a pre-coding step before the polar transform. In this scheme, the polar transform (as a mapper) and the successive cancellation process (as a demapper) present a synthetic vector channel to the convolutional transformation. The numerical results show that this concatenation improves the Hamming distance properties of polar codes. </div><div>In this work, we implement the parallel list Viterbi algorithm (LVA) and show how the error correction performance moves from the poor performance of the Viterbi algorithm (VA) to the superior performance of list decoding by changing the constraint length, list size, and the sorting strategy (local sorting and global sorting) in the LVA. Also, we analyze the latency of the local sorting of the paths in LVA relative to the global sorting in the list decoding and the trade-off between the sorting latency and the error correction performance.</div>

Network-on-Chip for Low Power MAP Decoder Using Folded Technique and CORDIC Algorithm for 5G Network

With different constraint length (K), time scale, and code rate, modified MAP (maximum a posteriori) decoder architecture using folding technique, which has a linear life time chart, is developed, and dedicated turbo codes will be placed in a network-on-chip for various wireless applications. Folded techniques mitigated the number of latches used in interleaving and deinterleaving unit by adopting forward and backward resource utilizing method to M-2, where M is the number of rows and end-to-end delay get reduced to 2M. By replacing conventional full adder by high speed adder using 2 x 1 multiplexer to calculate the forward state metrics and reverse state metrics will minimize the power consumption utilization in an effective manner. In s similar way, CORDIC (Coordinated ROtation DIgital Computer) algorithm is used to calculate the LLR value and confer a highly precise value with less computational complexity by means of only shifting and adding methods.

Constraint length inflation in fixed high rate convolutional codes and their impact on performance of O-IDMA

<p>To cope up with the higher data rate existing in modern communication systems multiple access technologies has been investigated OIDMA (Optical Interleave Division Multiple Access Technology) is one of the prominent technology use to fulfill this demand. Convolutional codes used in OIDMA systems enhance the performances and reduces the bit error rate of the system. In the present paper, the convolutional codes with increasing number of memory elements are used, the constraint length which depends on number of memory elements are increased with a systematic manner and their combined effect on response of OIDMA system has been observed. Tree inter-leavers in taken into account for analysis purpose and BER with increasing number of users is plotted in graphical and tabular manner.</p>

List Viterbi Decoding of PAC Codes

<div>Polarization-adjusted convolutional (PAC) codes are special concatenated codes in which we employ a one-to-one convolutional transform as a pre-coding step before the polar transform. In this scheme, the polar transform (as a mapper) and the successive cancellation process (as a demapper) present a synthetic vector channel to the convolutional transformation. The numerical results show that this concatenation improves the Hamming distance properties of polar codes. </div><div>In this work, we implement the parallel list Viterbi algorithm (LVA) and show how the error correction performance moves from the poor performance of the Viterbi algorithm (VA) to the superior performance of list decoding by changing the constraint length, list size, and the sorting strategy (local sorting and global sorting) in the LVA. Also, we analyze the latency of the local sorting of the paths in LVA relative to the global sorting in the list decoding and the trade-off between the sorting latency and the error correction performance.</div>

List Viterbi Decoding of PAC Codes

<div>Polarization-adjusted convolutional (PAC) codes are special concatenated codes in which we employ a one-to-one convolutional transform as a pre-coding step before the polar transform. In this scheme, the polar transform (as a mapper) and the successive cancellation process (as a demapper) present a synthetic vector channel to the convolutional transformation. The numerical results show that this concatenation improves the Hamming distance properties of polar codes. </div><div>In this work, we implement the parallel list Viterbi algorithm (LVA) and show how the error correction performance moves from the poor performance of the Viterbi algorithm (VA) to the superior performance of list decoding by changing the constraint length, list size, and the sorting strategy (local sorting and global sorting) in the LVA. Also, we analyze the latency of the local sorting of the paths in LVA relative to the global sorting in the list decoding and the trade-off between the sorting latency and the error correction performance.</div>

A Prediction Model for Concrete Cracks due to Chloride-Induced Corrosion

The nonhomogeneity of concrete leads to randomness in the development and extension of cracks. Scholars have proposed different models to analyze the development of cracks. Different from existing works on crack development, in this paper, we establish a crack spacing model on the basis of the mechanical equilibrium relation of differential elements. We also establish a mechanical equilibrium model considering that the shrinkage of concrete is constrained by the bonding force of reinforced concrete. Then, on the basis of the equilibrium condition, we propose an analytical model of spacing between the first crack and the second crack at the interface of steel and concrete due to corrosion expansion. This calculation model has only three variables: tensile strength, effective constraint length of the reinforcement, and bond force. In addition, the parameters are clearly defined. We verified the development of cracks at the interface between steel bar and concrete under chloride corrosion at different locations in a steel bar by comparing it with existing simulations and experimental results. The analytical model proposed in this paper has an accuracy of 92%, indicating that our expression for crack spacing can effectively predict the location of cracks.