Android-based capacitor discharging calculator application

<span lang="IN">Nowadays, many people using smartphone to connet to her colleague. The electronic device using capacitor and transistor. The electronic device’s size recently become smaller. The capacitor can be used to the most important function that is used to store the energy and on the DC system is used to decrease the ripple from AC source. This research purpose build an apps which can calculate the charge remaining inside the capacitor. The method is using RC time constant. This research work well and can work functionally. </span>

Chemically Roughened, Sputtered Au Films with Trace-Loaded Manganese Oxide for both On-Chip and Off-Chip High Frequency Supercapacitors

High frequency supercapacitors (HFSCs) are promising in alternating current line filtering and adaptable storage of high-frequency pulse electrical energy. Herein, we report a facile yet integrated-circuit-compatible fabrication of HFSC electrodes by combining chemical roughening of the sputtered metal (Au) films and in situ trace loading of a pseudocapacitive material (MnOx). The developed electrode fabrication route is versatile for different substrates, and is described with the application paradigms of both on-chip (with Si/SiO2 substrate) and off-chip (without Si/SiO2 substrate, with Ti substrate as an example in this study) HFSCs. With Au/MnOx films on Si/SiO2 substrates as the working electrodes, the derived on-chip HFSC displayed satisfactory performance in high frequency applications (i.e., an areal capacitance of 131.7 µF cm−2, a phase angle of −78°, and a RC time constant of 0.27 ms, at 120 Hz).

A low power trimming-free CMOS relaxation oscillator with process and temperature compensation

The design of a 22 KHz 358 nW CMOS relaxation oscillator with a process and temperature compensation scheme is presented. Instead of the commonly used RC time constant, the oscillation period of the proposed circuit is determined by the resistance ratio of several resistors, which is insensitive to process and temperature variations. The on-chip relaxation oscillator is simulated in a 0.18 [Formula: see text]m CMOS process. Without any calibration or off-chip components, the frequency variation of the proposed oscillator is ±[Formula: see text]3.24% across [Formula: see text] to 100[Formula: see text]C temperature range and 5 different process corners. Compared to the conventional relaxation oscillator, the frequency variation of this circuit is reduced by 89%. The simulated temperature coefficient is 111 ppm/[Formula: see text]C, and the frequency variation over the supply voltage from 1.2 V to 1.7 V is 2.1%/V. The typical power consumption of the proposed circuit is 358 nW.