Theory and applications of new fractional-order chaotic system under Caputo operator

This paper introduces the properties of a fractional-order chaotic system described by the Caputo derivative. The impact of the fractional-order derivative has been focused on. The phase portraits in different orders are obtained with the aids of the proposed numerical discretization, including the discretization of the Riemann-Liouville fractional integral. The stability analysis has been used to help us to delimit the chaotic region. In other words, the region where the order of the Caputo derivative involves and where the presented system in this paper is chaotic. The nature of the chaos has been established using the Lyapunov exponents in the fractional context. The schematic circuit of the proposed fractional-order chaotic system has been presented and simulated in via Mutltisim. The results obtained via Multisim simulation of the chaotic circuit are in good agreement with the results with Matlab simulations. That provided the fractional operators can be applied in real- worlds applications as modeling electrical circuits. The presence of coexisting attractors for particular values of the parameters of the presented fractional-order chaotic model has been studied.

Design of Digital Parity Generator Layout Using 0.7 micron Technology

The proposed digital parity generator circuit is an integrated circuit functions to detect data errors at the transmitter end, and check it at the receiving end. In digital communications, the digital messages are transmitted in the form of 1’s and 0’s between two points. It is an error free if both are the same. The purpose of this research is to implement a design method of digital parity generator layout with 0.7 micron process technology ECPD07 from Tanner Tools. Layout design starts from making schematic circuit, test function and make a layout. Next, check the layout results in terms of design rules and verify the desired functionality gradually. The results show that the circuit has functioned well as an odd parity generator. The simulation results obtained with loads CL = 25 fF, tpLH = 2nS and tpHL = 1.46 nS indicate that tp = 1.73nS or operating frequency of 578 MHz. The integrated digital parity generator circuit using transmission gate has a size of 14758 um2 (78.5 um x188 um), consisting of 74 gates.<br /><br />

Single event transients monitoring and diagnostic in FPGA

Analysis of single event transients (SETs) generated in field programmable gate arrays (FPGA) under heavy charged particles (HCP) irradiation and SET suppression methods is performed. The circuit for FPGA SET detection is designed for transients generated both inside FPGA and outside at package pin level. SET registration inside FPGA is carried out as an event when logical cell is switched. The SET control schematic circuit efficiency has been comparatively verified using heavy ion accelerator and picosecond focused laser source. SET in FPGA experimental results are presented and discussed.

Design of a nanoswitch in 130 nm CMOS technology for 2.4 GHz wireless terminals

This paper proposes a transmit/receive (T/R) nanoswitch in 130 nm CMOS technology for 2.4 GHz ISM band transceivers. It exhibits 1.03-dB insertion loss, 27.57-dB isolation and a power handling capacity (P1 dB) of 36.2-dBm. It dissipates only 6.87 μW power for 1.8/0 V control voltages and is capable of switching in 416.61 ps. Besides insertion loss and isolation of the nanoswitch is found to vary by 0.1 dB and 0.9 dB, respectively for a temperature change of 125°C. Only the transistor W/L optimization and resistive body floating technique is used for such lucrative performances. Besides absence of bulky inductors and capacitors in the schematic circuit help to attain the smallest chip area of 0.0071 mm2 which is the lowest ever reported in this frequency band. Therefore, simplicity and low chip area of the circuit trim down the cost of fabrication without compromising the performance issue.

Design and Realization of Tracking Autopilot for Leisure Yacht

On the basis of the autopilot control principle and the STM32F103RBT6 controller, an tracking autopilot for the leisure yacht was designed with manual steering and automatic steering function in this paper. The schematic circuit design and software design were detailedly described. Practical application confirmed that the autopilot has high reliability and good steering performance.