Equipment Anomaly Detection for Semiconductor Manufacturing by Exploiting Unsupervised Learning from Sensory Data

In-line anomaly detection (AD) not only identifies the needs for semiconductor equipment maintenance but also indicates potential line yield problems. Prompt AD based on available equipment sensory data (ESD) facilitates proactive yield and operations management. However, ESD items are highly diversified and drastically scale up along with the increased use of sensors. Even veteran engineers lack knowledge about ESD items for automated AD. This paper presents a novel Spectral and Time Autoencoder Learning for Anomaly Detection (STALAD) framework. The design consists of four innovations: (1) identification of cycle series and spectral transformation (CSST) from ESD, (2) unsupervised learning from CSST of ESD by exploiting Stacked AutoEncoders, (3) hypothesis test for AD based on the difference between the learned normal data and the tested sample data, (4) dynamic procedure control enabling periodic and parallel learning and testing. Applications to ESD of an HDP-CVD tool demonstrate that STALAD learns normality without engineers’ prior knowledge, is tolerant to some abnormal data in training input, performs correct AD, and is efficient and adaptive for fab applications. Complementary to the current practice of using control wafer monitoring for AD, STALAD may facilitate early detection of equipment anomaly and assessment of impacts to process quality.

Progress in Single Crystal Growth of Wide Bandgap Semiconductor SiC

The research and commercialization of SiC based power device have been burgeoning over the last decade worldwide, which is bringing about an increasing demand on lost-cost and low-defect SiC wafers. To meet this challenge, we have been continuously making efforts on improving the crystal growth and wafer processing techniques. Now, the mass-production of high quality 4-inch, 6-inch n-type and semi-insulating SiC wafers has been realized. Statistically, the micropipe density is lower than 0.5 cm-2. The resistivity of the wafers is lower than 0.02 Ω·cm and up to 108 Ω·cm for n-type and semi-insulating SiC single crystals, respectively. A state of the art processing technique has been developed to control wafer deformation and thickness within the desired values for subsequent epitaxy. The total defect number of the epitaxial layers grown on the "epi-ready" 4-inch SiC wafer is 63, and the usable area is 97.6%, indicating the high quality of our SiC substrates.

Unlocking the full Potential of Lithography for Advanced Packaging

Advanced Packaging technologies and applications are developing rapidly in order to support the ever increasing demand for integrating functionality in small and thin devices with low power consumption, high bandwidth, low latency- all at low cost of ownership. Lithography is the key enabling technology for developing and manufacturing such devices. Advanced Packaging processes, in particular Fan-Out, drive towards redistribution patterns with smallest feature sizes of a few micron today and towards 1 micron in the future. These feature sizes must be realized in production processes with multiple layers stacked on top of each other which need to be accurately aligned. In order to meet economic boundary conditions, routine operation on 300 mm wafers (possibly strongly warped) is required with high throughput. Kulicke & Soffa Liteq B.V. developed together with key partners, a novel Lithography system which is focused specifically to meet the challenging requirements of Advanced Packaging, both for current and future applications. The high quality optics used is capable to project the optimally sized reticle field with lowest possible aberrations on the wafer. The system includes Reticle Masking blades (REMA), which delivers high flexibility and high speed for multi-pattern jobs. The magnification of the optics is adjustable for optimal intra-field overlay performance. The reticle is illuminated by a high power UV laser. This novel setup creates many advantages for imaging, Cost of Ownership and throughput. The illumination and projection optics is combined with modern mechatronics to handle warped wafers with minimal overhead times. The design has a strong focus on contamination control. Wafer Edge Processing functions are integrated in the system to support the use of state-of-the-art plating processes. The modularity of the system architecture makes it possible to extend functionality and performance into the future. In this paper we will introduce the novel LITEQ 500 projection stepper, present imaging results and demonstrate the flexibility and high throughput potential of reticle masking for complex multi-pattern jobs.

Preparation and Characterization of Porous Collagen Membranes on Silicon

ABSTRACTAdvances in biotechnology in the past decade have raised the possibility of fabricating biocompatible, porous membranes for molecular sieving and dialysis separations of particles sized 20–50 nm or less. As a prerequisite for such applications, we demonstrate that thin films (∼ 400 nm) of monomeric bovine dermal collagen spin-deposited on a silicon substrate are patternable using standard semiconductor microlithographic processing techniques. Patterning via liftoff has reliably produced square features as small as 10–25 μm laterally, and 50 nm thick, in initial experiments.HVEM (high vacuum electron microscope) images of these collagen membranes have revealed typical pore sizes ranging from 1–100 nm. Through-membrane diffusion of chromophores spanning this size range was quantified via UV/vis spectrometry. These studies revealed that a 400 nm thick collagen membrane crosslinked with 0.02% glutaraldehyde rejected detectable quantities of methyl orange dye (MW 327) for at least 48 hours, while a 100 nm thick layer admitted methyl orange in under 30 minutes. DNA has been demonstrated to pass through a 100 nm thick collagen layer more slowly than through a bare through-etched control wafer.