Effect of Chemical Cleaning Sequencing on Particle Addition/Reduction on Silicon Wafers

1988 ◽  
pp. 37-42 ◽  
Author(s):  
Charlie A. Peterson
Keyword(s):  
Silicon Wafers ◽  
Chemical Cleaning ◽  
Particle Addition

Hydrogen plasma chemical cleaning of metallic substrates and silicon wafers

1995 ◽  
Vol 76-77 ◽  
pp. 731-737 ◽  
Author(s):  
N. Korner ◽  
E. Beck ◽  
A. Dommann ◽  
N. Onda ◽  
J. Ramm
Keyword(s):  
Hydrogen Plasma ◽  
Silicon Wafers ◽  
Plasma Chemical ◽  
Chemical Cleaning ◽  
Metallic Substrates

Arsenic segregation in polysilicon

1983 ◽  
Vol 41 ◽  
pp. 154-155 ◽  
Author(s):  
P.E. Batson ◽  
C.R.M. Grovenor ◽  
D.A. Smith ◽  
C. Wong
Keyword(s):  
Incident Beam ◽  
Silicon Wafers ◽  
Chemical Polishing ◽  
Bright Field Image ◽  
Beam Size ◽  
Stem Analysis ◽  
Bright Field ◽  
Twin Boundaries ◽  
X Ray ◽  
Line Scan

In this work As doped polysilicon was deposited onto (100) silicon wafers by APCVD at 660°C from a silane-arsine mixture, followed by a ten minute anneal at 1000°C, and in one case a further ten minute anneal at 700°C. Specimens for TEM and STEM analysis were prepared by chemical polishing. The microstructure, which is unchanged by the final 700°C anneal,is shown in Figure 1. It consists of numerous randomly oriented grains many of which contain twins.X-ray analysis was carried out in a VG HB5 STEM. As K α x-ray counts were collected from STEM scans across grain and twin boundaries, Figures 2-4. The incident beam size was about 1.5nm in diameter, and each of the 20 channels in the plots was sampled from a 1.6nm length of the approximately 30nm line scan across the boundary. The bright field image profile along the scanned line was monitored during the analysis to allow correlation between the image and the x-ray signal.

Preparation of integrated circuits for TEM electromigration in situ studies

1986 ◽  
Vol 44 ◽  
pp. 882-883
Author(s):  
J. V. Maskowitz ◽  
W. E. Rhoden ◽  
D. R. Kitchen ◽  
R. E. Omlor ◽  
P. F. Lloyd
Keyword(s):  
Integrated Circuits ◽  
Crystallographic Orientation ◽  
Silicon Wafers ◽  
Minimum Size ◽  
Test Vehicle ◽  
In Situ Studies ◽  
Boron Doped ◽  
Doped Silicon ◽  
Drill Holes

The fabrication of the aluminum bridge test vehicle for use in the crystallographic studies of electromigration involves several photolithographic processes, some common, while others quite unique. It is most important to start with a clean wafer of known orientation. The wafers used are 7 mil thick boron doped silicon. The diameter of the wafer is 1.5 inches with a resistivity of 10-20 ohm-cm. The crystallographic orientation is (111).Initial attempts were made to both drill and laser holes in the silicon wafers then back fill with photoresist or mounting wax. A diamond tipped dentist burr was used to successfully drill holes in the wafer. This proved unacceptable in that the perimeter of the hole was cracked and chipped. Additionally, the minimum size hole realizable was > 300 μm. The drilled holes could not be arrayed on the wafer to any extent because the wafer would not stand up to the stress of multiple drilling.

Low temperature drive-in of surface-deposited copper in silicon wafers

2004 ◽  
Vol 27 (1-3) ◽  
pp. 435-438 ◽  
Author(s):  
M. L. Polignano ◽  
D. Caputo ◽  
C. Carpanese ◽  
G. Salvà ◽  
L. Vanzetti
Keyword(s):  
Low Temperature ◽  
Silicon Wafers

Recombination Characteristics of Single-Crystalline Silicon Wafers with a Damaged Near-Surface Layer

2013 ◽  
Vol 58 (2) ◽  
pp. 142-150 ◽  
Author(s):  
A.V. Sachenko ◽  
◽  
V.P. Kostylev ◽  
V.G. Litovchenko ◽  
V.G. Popov ◽  
...  
Keyword(s):  
Surface Layer ◽  
Crystalline Silicon ◽  
Silicon Wafers ◽  
Single Crystalline Silicon ◽  
Near Surface ◽  
Single Crystalline

Silicon Surface Chemical Treatments in Oxide/Nitride Dielectric Stack Properties

2002 ◽  
Vol 716 ◽  
Author(s):  
D. Jacques ◽  
S. Petitdidier ◽  
J.L. Regolini ◽  
K. Barla
Keyword(s):  
Oxygen Content ◽  
Oxide Thickness ◽  
Morphological Data ◽  
Electrical Characteristics ◽  
Electrical Measurements ◽  
Chemical Cleaning ◽  
Force Microscopy ◽  
Chemical Treatments ◽  
Atomic Force ◽  
Interfacial Oxygen

AbstractOxide/Nitride dielectric stack is widely used as the standard dielectric for DRAM capacitors. The influence of the chemical cleaning prior to the stack formation has been studied in this work. As a result, morphological data such as stack surface roughness (Atomic Force Microscopy) and silicon nitride (SiN) incubation time for growth are comparable for all the studied cases on <Si>. However, Tof-SIMS exhibits different oxygen content at the Si/stack interface following the different chemical treatments. Electrical measurements show comparable C-V and I-V results, for the same Equivalent Oxide Thickness (same capacitance at strong accumulation i.e.-3V) while the different studied interfaces bring different interface states density with lower values for higher interfacial oxygen content. For DRAM applications, a clear improvement in electrical characteristics is obtained under low interfacial oxygen content conditions. Results are compared in embedded-DRAM cells for which we developed an industrially compatible dielectric deposition sequence to obtain minimum leakage current with maximum specific capacitance and no particular linking constraints.

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