Transformer Design for 77-GHz Down-Converter in 28-nm FD-SOI CMOS Technology

Author(s):  
Andrea Cavarra ◽  
Claudio Nocera ◽  
Giuseppe Papotto ◽  
Egidio Ragonese ◽  
Giuseppe Palmisano
Author(s):  
Florent Torres ◽  
Eric Kerhervé ◽  
Andreia Cathelin ◽  
Magali De Matos

Abstract This paper presents a 31 GHz integrated power amplifier (PA) in 28 nm Fully Depleted Silicon-On-Insulator Complementary Metal Oxide Semiconductor (FD-SOI CMOS) technology and targeting SoC implementation for 5 G applications. Fine-grain wide range power control with more than 10 dB tuning range is enabled by body biasing feature while the design improves voltage standing wave ratio (VSWR) robustness, stability and reverse isolation by using optimized 90° hybrid couplers and capacitive neutralization on both stages. Maximum power gain of 32.6 dB, PAEmax of 25.5% and Psat of 17.9 dBm are measured while robustness to industrial temperature range and process spread is demonstrated. Temperature-induced performance variation compensation, as well as amplitude-to-phase modulation (AM-PM) optimization regarding output power back-off, are achieved through body-bias node. This PA exhibits an International Technology Roadmap for Semiconductors figure of merit (ITRS FOM) of 26 925, the highest reported around 30 GHz to authors' knowledge.


2020 ◽  
Vol 10 (3) ◽  
pp. 27
Author(s):  
Andrea Ballo ◽  
Alfio Dario Grasso ◽  
Salvatore Pennisi ◽  
Chiara Venezia

Fully Depleted Silicon on Insulator (FD-SOI) CMOS technology offers the possibility of circuit performance optimization with reduction of both topology complexity and power consumption. These advantages are fully exploited in this paper in order to develop a new topology of active continuous-time second-order bandpass filter with maximum resonant frequency in the range of 1 GHz and wide electrically tunable quality factor requiring a very limited quiescent current consumption below 10 μA. Preliminary simulations that were carried out using the 28-nm FD-SOI technology from STMicroelectronics show that the designed example can operate up to 1.3 GHz of resonant frequency with tunable Q ranging from 90 to 370, while only requiring 6 μA standby current under 1-V supply.


2020 ◽  
Vol 168 ◽  
pp. 107737 ◽  
Author(s):  
P. Galy ◽  
R. Lethiecq ◽  
M. Bawedin
Keyword(s):  
28 Nm ◽  

Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1466
Author(s):  
Alessandro Parisi ◽  
Giuseppe Papotto ◽  
Egidio Ragonese ◽  
Giuseppe Palmisano

This paper presents a switched capacitor low-pass filter in a 28-nm fully depleted silicon on insulator CMOS technology for 77-GHz automotive radar applications. It is operated at a power supply as low as 1 V and guarantees 5-dB in-band voltage gain while providing out-of-band attenuation higher than 36 dB and a programmable passband up to 30 MHz. A double sampling technique is adopted, which allows high operating frequency to be achieved while saving power. Moreover, low-voltage biasing and common-mode feedback circuits are exploited to guarantee an almost rail-to-rail output voltage swing. The proposed filter provides an output 1-dB compression point as high as 8.7 dBm with a power consumption of 9 mW. To the authors’ knowledge, this is the first SC-based implementation of a low pass filter for automotive radar applications.


Author(s):  
Claudio Nocera ◽  
Giuseppe Papotto ◽  
Andrea Cavarra ◽  
Egidio Ragonese ◽  
Giuseppe Palmisano

Sensors ◽  
2021 ◽  
Vol 21 (12) ◽  
pp. 4014
Author(s):  
Mohammadreza Dolatpoor Lakeh ◽  
Jean-Baptiste Kammerer ◽  
Enagnon Aguénounon ◽  
Dylan Issartel ◽  
Jean-Baptiste Schell ◽  
...  

An ultrafast Active Quenching—Active Reset (AQAR) circuit is presented for the afterpulsing reduction in a Single Photon Avalanche Diode (SPAD). The proposed circuit is designed in a 28 nm Fully Depleted Silicon On Insulator (FD-SOI) CMOS technology. By exploiting the body biasing technique, the avalanche is detected very quickly and, consequently, is quenched very fast. The fast quenching decreases the avalanche charges, therefore resulting in the afterpulsing reduction. Both post-layout and experimental results are presented and are highly in accordance with each other. It is shown that the proposed AQAR circuit is able to detect the avalanche in less than 40 ps and reduce the avalanche charge and the afterpulsing up to 50%.


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