Digital Circuitry and Interfacing

2016 ◽  
pp. 37-80
Author(s):  
Brock J. LaMeres
Keyword(s):  
Digital Circuitry

scholarly journals Optimum power transfer in RF front end systems using adaptive impedance matching technique

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Mohammad Alibakhshikenari ◽  
Bal S. Virdee ◽  
Leyre Azpilicueta ◽  
Chan H. See ◽  
Raed Abd-Alhameed ◽  
...  
Keyword(s):  
Impedance Matching ◽  
Adaptive Antenna ◽  
Power Transfer ◽  
Control Loops ◽  
Matching Networks ◽  
Front End ◽  
Rf Front End ◽  
Matching Technique ◽  
Digital Circuitry ◽  
Communications System

AbstractMatching the antenna’s impedance to the RF-front-end of a wireless communications system is challenging as the impedance varies with its surround environment. Autonomously matching the antenna to the RF-front-end is therefore essential to optimize power transfer and thereby maintain the antenna’s radiation efficiency. This paper presents a theoretical technique for automatically tuning an LC impedance matching network that compensates antenna mismatch presented to the RF-front-end. The proposed technique converges to a matching point without the need of complex mathematical modelling of the system comprising of non-linear control elements. Digital circuitry is used to implement the required matching circuit. Reliable convergence is achieved within the tuning range of the LC-network using control-loops that can independently control the LC impedance. An algorithm based on the proposed technique was used to verify its effectiveness with various antenna loads. Mismatch error of the technique is less than 0.2%. The technique enables speedy convergence (< 5 µs) and is highly accurate for autonomous adaptive antenna matching networks.

scholarly journals Charge-Line Dual-FET High-Repetition-Rate Pulsed Laser Driver

2019 ◽  
Vol 9 (7) ◽  
pp. 1289 ◽  
Author(s):  
Mateusz Żbik ◽  
Piotr Wieczorek
Keyword(s):  
Laser Diode ◽  
Repetition Rate ◽  
Field Effect Transistors ◽  
High Reliability ◽  
Pulsed Laser ◽  
High Repetition Rate ◽  
High Repetition ◽  
Laser Driver ◽  
Charge Line ◽  
Digital Circuitry

Most modern pulsed laser systems require versatile laser diode drivers. A state-of-the-art pulsed laser driver should provide precise peak power regulation, high repetition rate, and pulse duration control. A new, charge line dual-FET transistor circuit structure was developed to provide all these features. The pulsed modulation current is adjustable up to Imax = 1.2 A, with the laser diode forward voltage acceptable up to UF max = 20 V. The maximum repetition rate is limited by a charge line circuit to frep max = 20 MHz. Compared to the conventional single transistor drivers, the solution proposed in this paper allows a precise, high resolution width regulation to be obtained, whereas a low pulse jitter is ensured. In the solution, two separate, out-of-phase signals are used to trigger the individual Field Effect Transistors (FET). The resultant pulsed modulation current full-width-at-half-maxima (FWHM) is regulated from ~200 ps up to 2 ns. All control and timing signals are generated with a popular Field-Programmable Gate Array (FPGA) digital circuitry. The use of standard FPGA devices ensures the low cost and high reliability of the circuit, which are not available in laser drivers consisting of sophisticated analogue adjustable delay circuits.

Comparison and Impact of Substrate Noise Generated by Clocked and Clockless Digital Circuitry

2006 ◽  
Author(s):  
Jim Le ◽  
Christopher Hanken ◽  
Martin Held ◽  
Mike Hagedorn ◽  
Kartikeya Mayaram ◽  
...  
Keyword(s):  
Substrate Noise ◽  
Digital Circuitry

Formal design verification of digital circuitry

1991 ◽  
Vol 32 (1-2) ◽  
pp. 67-93 ◽  
Author(s):  
Ricky W. Butler ◽  
Jon A. Sjogren
Keyword(s):  
Design Verification ◽  
Digital Circuitry ◽  
Formal Design

Tunnel Diode Digital Circuitry

1960 ◽  
Vol EC-9 (3) ◽  
pp. 295-301 ◽  
Author(s):  
W. F. Chow
Keyword(s):  
Tunnel Diode ◽  
Digital Circuitry

scholarly journals New Approach to Heart Sound Screening in Children by Analog-Digital Circuitry

1965 ◽  
Vol 80 (9) ◽  
pp. 761 ◽  
Author(s):  
Robert E. Durnin ◽  
Harvey F. Glassner ◽  
Clinton O. Jorgensen ◽  
Donald C. Fyler
Keyword(s):  
Heart Sound ◽  
New Approach ◽  
Digital Circuitry

scholarly journals IC-Based Neuro-Stimulation Environment for Arbitrary Waveform Generation

Electronics ◽  
2021 ◽  
Vol 10 (15) ◽  
pp. 1867
Author(s):  
Florian Kolbl ◽  
Yannick Bornat ◽  
Jonathan Castelli ◽  
Louis Regnacq ◽  
Gilles N’Kaoua ◽  
...  
Keyword(s):  
High Frequency ◽  
Proof Of Concept ◽  
Single Application ◽  
Arbitrary Waveform Generation ◽  
Waveform Generation ◽  
Wide Range ◽  
Arbitrary Waveform ◽  
Digital Circuitry ◽  
Stimulation Of

Electrical stimulation of the nervous system is commonly based on biphasic stimulation waveforms, which limits its relevance for some applications, such as selective stimulation. We propose in this paper a stimulator capable of delivering arbitrary waveforms to electrodes, and suitable for non-conventional stimulation strategies. Such a system enables in vivo stimulation protocols with optimized efficacy or energy efficiency. The designed system comprises a High Voltage CMOS ASIC generating a configurable stimulating current, driven by a digital circuitry implemented on a FPGA. After fabrication, the ASIC and system were characterized and tested; they successfully generated programmable waveforms with a frequential content up to 1.2 MHz and a voltage compliance between [−17.9; +18.3] V. The system is not optimum when compared to single application stimulators, but no embedded stimulator in the literature offers an equivalent bandwidth which allows the wide range of stimulation paradigms, including high-frequency blocking stimulation. We consider that this stimulator will help test unconventional stimulation waveforms and can be used to generate proof-of-concept data before designing implantable and application-dedicated implantable stimulators.

scholarly journals Evolutionary trends in Transmit/Receive Module for Active Phased Array Radars

2018 ◽  
Vol 68 (6) ◽  
pp. 553 ◽  
Author(s):  
Somsing Rathod ◽  
Kilari Sreenivasulu ◽  
KS Beenamole ◽  
KP Ray
Keyword(s):  
Antenna Array ◽  
Phased Array ◽  
Critical Role ◽  
Technological Evolution ◽  
Evolutionary Trends ◽  
Active Antenna ◽  
Performance Parameters ◽  
Electronic Warfare ◽  
Phased Array Radar ◽  
Digital Circuitry

<p>Worldwide, defense technologies are rapidly evolving and are currently aiming at integrating diverse functionalities like Radar, Electronic Warfare, Communications, etc., on a singular miniaturized platform. Hence, it cannot be denied that the advancements in modern Active Phased Array Radar technologies assume a critical role towards the achievement of this goal. A typical Active Phased Array Radar comprises of an Active Antenna Array Unit (AAAU) consisting of a large number of radiating elements, Transmit/Receive (T/R) Modules with other associated RF and digital circuitry and power electronics.  This paper presents mainly the developments in Transmit/Receive (T/R) Module technology, which assimilates various stages of the technological evolution - past, current and futuristic. It discusses how these technologies contribute towards the improvement of efficiency, miniaturization and reliability without compromising its performance parameters.</p>

scholarly journals A low-voltage CMOS current-mode differential front-end for optical communications

2021 ◽  
Author(s):  
Bendong Sun
Keyword(s):  
Optical Communications ◽  
Dynamic Range ◽  
Low Voltage ◽  
Supply Voltage ◽  
Current Mode ◽  
Building Blocks ◽  
Switching Noise ◽  
Current Feedback ◽  
Fully Differential ◽  
Digital Circuitry

This thesis deals with the design of a low-voltage fully-differential CMOS current-mode preamplifier for optical communications. An in-depth comparative analysis of the building blocks of low-voltage CMOS current-mode circuits is carried out. Two new bandwidth enhancement techniques, namely inductor series-peaking and current feedback, are introduced and implemented in the design. The feedback also reduces the value of the series-peaking inductor. The minimum supply voltage of the amplifier is only one threshold voltage plus one pinch-off voltage. The preamplifier has a balanced differential topology such that the effect of bias dependent mismatches is minimized and the amplifier is insensitive to the switching noise caused by the digital circuitry. Negative differential current feedbacks are implemented to boost the bandwidth and increase the dynamic range.

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