Minimization of Cascade Low-Noise Amplifier with 0.18 μm CMOS Process for 2.4 GHz RFID Applications

Author(s):  
Mu-Chun Wang ◽  
Hsin-Chia Yang ◽  
Yi-Jhen Li
2021 ◽  
Vol 3 (4) ◽  
Author(s):  
S. Chrisben Gladson ◽  
Adith Hari Narayana ◽  
V. Thenmozhi ◽  
M. Bhaskar

AbstractDue to the increased processing data rates, which is required in applications such as fifth-generation (5G) wireless networks, the battery power will discharge rapidly. Hence, there is a need for the design of novel circuit topologies to cater the demand of ultra-low voltage and low power operation. In this paper, a low-noise amplifier (LNA) operating at ultra-low voltage is proposed to address the demands of battery-powered communication devices. The LNA dual shunt peaking and has two modes of operation. In low-power mode (Mode-I), the LNA achieves a high gain ($$S21$$ S 21 ) of 18.87 dB, minimum noise figure ($${NF}_{min.}$$ NF m i n . ) of 2.5 dB in the − 3 dB frequency range of 2.3–2.9 GHz, and third-order intercept point (IIP3) of − 7.9dBm when operating at 0.6 V supply. In high-power mode (Mode-II), the achieved gain, NF, and IIP3 are 21.36 dB, 2.3 dB, and 13.78dBm respectively when operating at 1 V supply. The proposed LNA is implemented in UMC 180 nm CMOS process technology with a core area of $$0.40{\mathrm{ mm}}^{2}$$ 0.40 mm 2 and the post-layout validation is performed using Cadence SpectreRF circuit simulator.


2009 ◽  
Vol 30 (1) ◽  
pp. 015001 ◽  
Author(s):  
Yang Yi ◽  
Gao Zhuo ◽  
Yang Liqiong ◽  
Huang Lingyi ◽  
Hu Weiwu

1996 ◽  
Vol 32 (13) ◽  
pp. 1191 ◽  
Author(s):  
Y.-C. Ho ◽  
M. Biyani ◽  
J. Colvin ◽  
C. Smithhisler ◽  
K. O

Sensors ◽  
2021 ◽  
Vol 21 (24) ◽  
pp. 8476
Author(s):  
Yuxuan Tang ◽  
Yulang Feng ◽  
He Hu ◽  
Cheng Fang ◽  
Hao Deng ◽  
...  

This paper presents a wideband low-noise amplifier (LNA) front-end with noise and distortion cancellation for high-frequency ultrasound transducers. The LNA employs a resistive shunt-feedback structure with a feedforward noise-canceling technique to accomplish both wideband impedance matching and low noise performance. A complementary CMOS topology was also developed to cancel out the second-order harmonic distortion and enhance the amplifier linearity. A high-frequency ultrasound (HFUS) and photoacoustic (PA) imaging front-end, including the proposed LNA and a variable gain amplifier (VGA), was designed and fabricated in a 180 nm CMOS process. At 80 MHz, the front-end achieves an input-referred noise density of 1.36 nV/sqrt (Hz), an input return loss (S11) of better than −16 dB, a voltage gain of 37 dB, and a total harmonic distortion (THD) of −55 dBc while dissipating a power of 37 mW, leading to a noise efficiency factor (NEF) of 2.66.


2018 ◽  
Vol 32 (02) ◽  
pp. 1850009 ◽  
Author(s):  
Benqing Guo ◽  
Jun Chen ◽  
Hongpeng Chen ◽  
Xuebing Wang

An inductorless noise-canceling CMOS low-noise amplifier (LNA) with wideband linearization technique is proposed. The complementary configuration by stacked NMOS/PMOS is employed to compensate second-order nonlinearity of the circuit. The third-order distortion of the auxiliary stage is also mitigated by that of the weak inversion transistors in the main path. The bias and scaling size combined by digital control words are further tuned to obtain enhanced linearity over the desired band. Implemented in a 0.18 [Formula: see text]m CMOS process, simulated results show that the proposed LNA provides a voltage gain of 16.1 dB and a NF of 2.8–3.4 dB from 0.1 GHz to 1.4 GHz. The IIP3 and IIP2 of 13–18.9 and 24–40 dBm are obtained, respectively. The circuit core consumes 19 mW from a 1.8 V supply.


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