Effect of Channel Doping Variation on Electrostatic Characteristics of 3D Double Gate Junctionless Transistor

Mapping Intimacies ◽

10.1007/978-981-16-2109-3_45 ◽

2021 ◽

pp. 489-497

Author(s):

Achinta Baidya ◽

Rajesh Saha ◽

Jayendra Kumar ◽

Sadhan Gope ◽

Chaitali Koley

Keyword(s):

Double Gate ◽

Junctionless Transistor

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Design and Performance Analysis of Proposed Biosensor based on Double Gate Junctionless Transistor

Silicon ◽

10.1007/s12633-021-01335-6 ◽

2021 ◽

Author(s):

Pawandeep Kaur ◽

Avtar Singh Buttar ◽

Balwinder Raj

Keyword(s):

Performance Analysis ◽

Double Gate ◽

Junctionless Transistor ◽

And Performance

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Effect of Au-Al Dual-Metal Gate on 3D Double-Gate Junctionless Transistor Performance

10.1007/978-981-16-2109-3_39 ◽

2021 ◽

pp. 421-429

Author(s):

Achinta Baidya ◽

Rajesh Saha ◽

Amarnath Gaini ◽

Chaitali Koley ◽

Somen Debnath ◽

...

Keyword(s):

Double Gate ◽

Junctionless Transistor ◽

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Transport characteristics of double gate n-channel junctionless transistor

2016 9th International Conference on Electrical and Computer Engineering (ICECE) ◽

10.1109/icece.2016.7853938 ◽

2016 ◽

Author(s):

Tanmoy Kumar Paul ◽

Quazi D. M. Khosru

Keyword(s):

Double Gate ◽

Junctionless Transistor

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Simulation of One-Transistor Dynamic Random-Access Memory Based on Symmetric Double-Gate Si Junctionless Transistor

Journal of Nanoscience and Nanotechnology ◽

10.1166/jnn.2018.15707 ◽

2018 ◽

Vol 18 (9) ◽

pp. 6593-6597

Author(s):

Bo Gyeong Kim ◽

Jae Hwa Seo ◽

Young Jun Yoon ◽

Min Su Cho ◽

Eunseon Yu ◽

...

Keyword(s):

Random Access ◽

Random Access Memory ◽

Dynamic Random Access Memory ◽

Double Gate ◽

Access Memory ◽

Junctionless Transistor

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Study of Extended Back Gate Double Gate JunctionLess Transistor: Theoretical and Numerical Investigation

Springer Proceedings in Physics - The Physics of Semiconductor Devices ◽

10.1007/978-3-319-97604-4_98 ◽

2019 ◽

pp. 633-642

Author(s):

Vandana Kumari ◽

Abhineet Sharan ◽

Manoj Saxena ◽

Mridula Gupta

Keyword(s):

Numerical Investigation ◽

Double Gate ◽

Back Gate ◽

Junctionless Transistor

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Linear Distortion Analysis of 3D Double Gate Junctionless Transistor with High-K Dielectrics and Gate Metals

Silicon ◽

10.1007/s12633-020-00669-x ◽

2020 ◽

Author(s):

Achinta Baidya ◽

T. R. Lenka ◽

S. Baishya

Keyword(s):

Double Gate ◽

High K ◽

Distortion Analysis ◽

Junctionless Transistor

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Enhanced sensitivity of double gate junctionless transistor architecture for biosensing applications

Nanotechnology ◽

10.1088/0957-4484/26/14/145201 ◽

2015 ◽

Vol 26 (14) ◽

pp. 145201 ◽

Author(s):

Mukta Singh Parihar ◽

Abhinav Kranti

Keyword(s):

Double Gate ◽

Enhanced Sensitivity ◽

Junctionless Transistor

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Estimation of process-induced variations in double-gate junctionless transistor

2012 5th International Conference on Computers and Devices for Communication (CODEC) ◽

10.1109/codec.2012.6509298 ◽

2012 ◽

Author(s):

Ratul Kumar Baruah ◽

Roy P. Paily

Keyword(s):

Double Gate ◽

Junctionless Transistor

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High performance dual spacer double gate junctionless transistor for digital integrated circuits

2016 International Conference on Inventive Computation Technologies (ICICT) ◽

10.1109/inventive.2016.7824837 ◽

2016 ◽

Author(s):

Govind Jawade ◽

Y.V. Chavan ◽

S. G. Wagaj

Keyword(s):

Integrated Circuits ◽

High Performance ◽

Double Gate ◽

Digital Integrated Circuits ◽

Junctionless Transistor

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Investigating short channel effects and performance parameters of double gate junctionless transistor at various technology nodes

2015 2nd International Conference on Recent Advances in Engineering & Computational Sciences (RAECS) ◽

10.1109/raecs.2015.7453429 ◽

2015 ◽

Author(s):

Vishal Narula ◽

Charu Narula ◽

Jatinder Singh

Keyword(s):

Double Gate ◽

Short Channel Effects ◽

Performance Parameters ◽

Short Channel ◽

Junctionless Transistor ◽

Channel Effects ◽

And Performance ◽

Technology Nodes

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