Characteristics of Sn-2.5Ag flip chip solder joints under thermal shock test conditions

2009 ◽  
Vol 23 (2) ◽  
pp. 435-441 ◽  
Author(s):  
Kyoung Chun Yang ◽  
Seong Hyuk Lee ◽  
Jong-Min Kim ◽  
Young Ki Choi ◽  
Dave F. Farson ◽  
...  
2006 ◽  
Vol 504 (1-2) ◽  
pp. 426-430 ◽  
Author(s):  
Dae-Gon Kim ◽  
Jong-Woong Kim ◽  
Seung-Boo Jung

2009 ◽  
Vol 15 (4) ◽  
pp. 655-660 ◽  
Author(s):  
Sang-Su Ha ◽  
Sang-Ok Ha ◽  
Jeong-Won Yoon ◽  
Jong-Woong Kim ◽  
Min-Kwan Ko ◽  
...  

2005 ◽  
Vol 82 (3-4) ◽  
pp. 575-580 ◽  
Author(s):  
Dae-Gon Kim ◽  
Jong-Woong Kim ◽  
Seung-Boo Jung

2019 ◽  
Vol 4 (1) ◽  
pp. 1-6 ◽  
Author(s):  
Daniel Koncz-Horvath ◽  
Aliz Molnar ◽  
Greta Gergely ◽  
Manoj Kumar Pal ◽  
Zoltan Gacsi

2020 ◽  
Vol 112 ◽  
pp. 113918
Author(s):  
Haksan Jeong ◽  
Kyung Deuk Min ◽  
Choong-Jae Lee ◽  
Jae-Ha Kim ◽  
Seung-Boo Jung

Materials ◽  
2019 ◽  
Vol 13 (1) ◽  
pp. 94 ◽  
Author(s):  
Jiajie Fan ◽  
Jie Wu ◽  
Changzhen Jiang ◽  
Hao Zhang ◽  
Mesfin Ibrahim ◽  
...  

To make the light-emitting diode (LED) more compact and effective, the flip chip solder joint is recommended in LED chip-scale packaging (CSP) with critical functions in mechanical support, heat dissipation, and electrical conductivity. However, the generation of voids always challenges the mechanical strength, thermal stability, and reliability of solder joints. This paper models the 3D random voids generation in the LED flip chip Sn96.5–Ag3.0–Cu0.5 (SAC305) solder joint, and investigates the effect of thermal shock load on its mechanical reliability with both simulations and experiments referring to the JEDEC thermal shock test standard (JESD22-A106B). The results reveal the following: (1) the void rate of the solder joint increases after thermal shock ageing, and its shear strength exponentially degrades; (2) the first principal stress of the solder joint is not obviously increased, however, if the through-hole voids emerged in the corner of solder joints, it will dramatically increase; (3) modelling of the fatigue failure of solder joint with randomly distributed voids utilizes the approximate model to estimate the lifetime, and the experimental results confirm that the absolute prediction error can be controlled around 2.84%.


2018 ◽  
Vol 30 (4) ◽  
pp. 205-212 ◽  
Author(s):  
Agata Skwarek ◽  
Balázs Illés ◽  
Krzysztof Witek ◽  
Tamás Hurtony ◽  
Jacek Tarasiuk ◽  
...  

Purpose This paper aims to investigate the quality and reliability of solder joints prepared from Pb-free alloys on direct bounded Cu (DBC) substrates. Two types of solder alloys were studied: Sn90.95Ag3.8Cu0.7Sb1.4Ni0.15Bi3.0, with a high melting point of 225°C, and Sn42Bi58, with low a melting point of 138°C. Design/methodology/approach Capacitor components of size 1806 were soldered on DBC substrates by using convection reflow soldering and vacuum vapor-phase soldering technologies. A part of the samples was subjected to the thermal shock test. The structure of the solder joints and the content of the voids were investigated using three-dimensional X-ray tomography. The mechanical strength of the joints was evaluated using the shear force test, and the microstructure of the joints was studied on metallographic cross sections by using scanning electron microscopy. Findings It was found that the number of voids is not related directly to the mechanical strength of the solder joints. The mechanical strength of the solder joints depends more on the amount of Ag3Sn precipitation, Au precipitation and the intermetallic layer in the solder joints. In some cases, the thermal shock test caused micro-cracks around the Au precipitation because of a mismatch of Au, AuSn4 and Sn in terms of coefficients of thermal expansion. Originality/value DBC substrates are usually used for power electronics, where the quality of the solder joints is even more important than in the case of commercial electronics.


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