Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications

Electronic circuits and systems employed in mission- and safety-critical applications such as space, aerospace, nuclear plants etc. tend to suffer from multiple faults due to radiation and other harsh external phenomena. To overcome single or multiple faults from affecting electronic circuits and systems, progressive module redundancy (PMR) has been suggested as a potential solution that recommends the use of different levels of redundancy for the vulnerable portions of a circuit or system depending upon their criticality. According to PMR, triple modular redundancy (TMR) can be used where a single fault is likely to occur and should be masked, and quintuple modular redundancy (QMR) can be used where double faults are likely to occur and should be masked. In this article, we present asynchronous QDI majority voter designs for QMR and state which are preferable from cycle time (i.e., speed), area, power, and energy perspectives. Towards this, we implemented example QMR circuits in a robust QDI asynchronous design style by employing a delay insensitive dual rail code for data encoding and adopting four-phase handshake protocols for data communication. Based on physical implementations using a 32/28nm CMOS process, we find that our proposed QMR majority voter achieves improved optimization in speed and energy.

Download Full-text

Generalized Majority Voter Design Method for N-Modular Redundant Systems Used in Mission- and Safety-Critical Applications

Computers ◽

10.3390/computers8010010 ◽

2019 ◽

Vol 8 (1) ◽

pp. 10 ◽

Cited By ~ 5

Author(s):

Jaytrilok Choudhary ◽

Padmanabhan Balasubramanian ◽

Danny Varghese ◽

Dhirendra Singh ◽

Douglas Maskell

Keyword(s):

Design Method ◽

Majority Voting ◽

Normal Operation ◽

Majority Logic ◽

Simultaneous Production ◽

Safety Critical ◽

Majority Voter ◽

Logic Equation ◽

Modular Redundancy ◽

Common Logic

Mission- and safety-critical circuits and systems employ redundancy in their designs to overcome any faults or failures of constituent circuits and systems during the normal operation. In this aspect, the N-modular redundancy (NMR) is widely used. An NMR system is comprised of N identical systems, the corresponding outputs of which are majority voted to generate the system outputs. To perform majority voting, a majority voter is required, and the sizes of majority voters tend to vary depending on an NMR system. Majority voters corresponding to NMR systems are physically realized by enumerating the majority input clauses corresponding to an NMR system and then synthesizing the majority logic equation. The issue is that the number of majority input clauses corresponding to an NMR system is governed by a mathematical combination, the complexity of which increases substantially with increases in the level of redundancy. In this context, the design of a majority voter of any size corresponding to an NMR specification based on a new, generalized design approach is described. The proposed approach is inherently hierarchical and progressive since any NMR majority voter can be constructed from an (N − 2)MR majority voter along with additional logic corresponding to the two extra inputs. Further, the proposed approach paves the way for simultaneous production of the NMR system outputs corresponding to different degrees of redundancy, which is not intrinsic to the existing methods. This feature is additionally useful for any sharing of common logic with diverse degrees of redundancy in appropriate portions of an NMR implementation.

Download Full-text

Majority and Minority Voted Redundancy Scheme for Safety-Critical Applications with Error/No-Error Signaling Logic

Electronics ◽

10.3390/electronics7110272 ◽

2018 ◽

Vol 7 (11) ◽

pp. 272 ◽

Cited By ~ 2

Author(s):

Padmanabhan Balasubramanian ◽

Douglas Maskell ◽

Nikos Mastorakis

Keyword(s):

Critical Path ◽

Cmos Technology ◽

Path Delay ◽

Silicon Area ◽

Multiple Faults ◽

Design Metrics ◽

Safety Critical ◽

Critical Path Delay ◽

Function Blocks ◽

Modular Redundancy

In the era of nanoelectronics, multiple faults or failures of function blocks are likely to occur. To withstand these, higher levels of redundancy are suggested to be employed in at least the sensitive portions of a circuit or system. In this context, the N-modular redundancy (NMR) scheme may be used to guard against the multiple faults or failures of function blocks. However, the NMR scheme would exacerbate the weight, cost, and design metrics to implement higher-order redundancy. Hence, as an alternative to the NMR, the majority and minority voted redundancy (MMR) scheme was proposed recently. However, the proposal was restricted to the basic implementation with no provision for indicating the correct or the incorrect operation of the MMR. Hence in this work, we present the MMR scheme with the error/no-error signaling logic (ESL). Example NMR circuits without and with the ESL (NMRESL), and example MMR circuits without and with the proposed ESL (MMRESL) were implemented to achieve similar degrees of fault tolerance using a 32/28-nm CMOS technology. The results show that, on average, the proposed MMRESL circuits have 18.9% less critical path delay, dissipate 64.8% less power, and require 49.5% less silicon area compared to their counterpart NMRESL circuits.

Download Full-text

Survey on Approximate Computing and Its Intrinsic Fault Tolerance

Electronics ◽

10.3390/electronics9040557 ◽

2020 ◽

Vol 9 (4) ◽

pp. 557 ◽

Cited By ~ 3

Author(s):

Gennaro Rodrigues ◽

Fernanda Lima Kastensmidt ◽

Alberto Bosio

Keyword(s):

Fault Tolerance ◽

Software Architecture ◽

Execution Time ◽

State Of The Art ◽

High Reliability ◽

Approximate Computing ◽

Safety Critical ◽

Triple Modular Redundancy ◽

Modular Redundancy ◽

Error Masking

This work is a survey on approximate computing and its impact on fault tolerance, especially for safety-critical applications. It presents a multitude of approximation methodologies, which are typically applied at software, architecture, and circuit level. Those methodologies are discussed and compared on all their possible levels of implementations (some techniques are applied at more than one level). Approximation is also presented as a means to provide fault tolerance and high reliability: Traditional error masking techniques, such as triple modular redundancy, can be approximated and thus have their implementation and execution time costs reduced compared to the state of the art.

Download Full-text