Effects of TSVs (through-silicon vias) on thermal performances of 3D IC integration system-in-package (SiP)

2012 ◽  
Vol 52 (11) ◽  
pp. 2660-2669 ◽  
Author(s):  
John H. Lau ◽  
Tang Gong Yue
2011 ◽  
Vol 2011 (1) ◽  
pp. 000001-000007
Author(s):  
Chien-Ying Wu ◽  
Shang-Chun Chen ◽  
Pei-Jer Tzeng ◽  
John H. Lau ◽  
Yi-Feng Hsu ◽  
...  

In this study, key enabling technologies such as the oxide liner by the PECVD, the barrier and seed layers by the PVD, and Cu-plating of blind TSVs on 300mm wafers for 3D integration are investigated. Emphases are placed on the determination and optimization of the important parameters for each of the key enabling technologies. Also, leakage currents of the fabricated Cu-filled TSVs are measured. Furthermore cross sections and SEM of the fabricated TSVs are provided and examined.


Author(s):  
C. W. Luo ◽  
Y. C. Wu ◽  
J. Y. Wang ◽  
S. S. H. Hsu

2012 ◽  
Vol 2012 (1) ◽  
pp. 000239-000243
Author(s):  
Srinidhi Raghavan Narasimhan ◽  
A. Ege Engin

The 3D IC integration technology and silicon interposers rely on through silicon vias (TSVs) for vertical interconnections. Hence, the medium carrying high frequency signals is lossy silicon (Si). Fundamental understanding of wave propagation through TSVs is essential for successful implementation of 3D IC integration technology as well as for the development of Si interposers at RF/microwave frequencies. The focus of this paper is characterization and modelling of TSVs and Si to explore high speed signal propagation through the lossy Si medium. To understand better the physical significance of the TSV, we will establish a framework for wave propagation through TSVs based on dielectric quasi-TEM, skin effect, and slow-wave modes similar to MIS micro-strip lines. For validation of the existence of these modes, full wave simulation results will be compared with simpler two dimensional transmission line simulators.


2012 ◽  
Vol 9 (1) ◽  
pp. 31-36 ◽  
Author(s):  
Chien-Ying Wu ◽  
Shang-Chun Chen ◽  
Pei-Jer Tzeng ◽  
John H. Lau ◽  
Yi-Feng Hsu ◽  
...  

In this study, key enabling technologies such as the oxide liner by the PECVD, the barrier and seed layers by the PVD, and Cu plating of blind TSVs on 300 mm wafers for 3D integration are investigated. Emphasis is placed on the determination and optimization of the important parameters for each of the key enabling technologies. Also, the leakage current of the fabricated Cu-filled TSVs is measured. Furthermore, cross sections and SEM of the fabricated TSVs are examined.


2012 ◽  
Vol 2012 (1) ◽  
pp. 001221-001228 ◽  
Author(s):  
Jui-Feng Hung ◽  
John H. Lau ◽  
Peng-Shu Chen ◽  
Shih-Hsien Wu ◽  
Sheng-Che Hung ◽  
...  

In this study, the electrical performance of a general TSV structure for high-frequency 3D IC integration applications is investigated. Emphasis is placed on the proposal of an analytical model and the analytical equations of a TSV with all its key parameters. Also, the model and equations are verified, both in the frequency and time domains, by more detailed finite element analyses. Finally, a TSV electrical design guideline is proposed.


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