scholarly journals Surface point defects on bulk oxides: atomically-resolved scanning probe microscopy

2017 ◽  
Vol 46 (7) ◽  
pp. 1772-1784 ◽  
Author(s):  
Martin Setvín ◽  
Margareta Wagner ◽  
Michael Schmid ◽  
Gareth S. Parkinson ◽  
Ulrike Diebold

Metal oxides are abundant in nature and they are some of the most versatile materials for applications ranging from catalysis to novel electronics.

2018 ◽  
Vol 11 (05) ◽  
pp. 1830002 ◽  
Author(s):  
Wanheng Lu ◽  
Kaiyang Zeng

The structure-function relationship at the nanoscale is of great importance for many functional materials, such as metal oxides. To explore this relationship, Scanning Probe Microscopy (SPM)-based techniques are used as powerful and effective methods owing to their capability to investigate the local surface structures and multiple properties of the materials with a high spatial resolution. This paper gives an overview of SPM-based techniques for characterizing the electric properties of metal oxides with potential in the applications of electronics devices. Three types of SPM techniques, including conductive AFM ([Formula: see text]-AFM), Kelvin Probe Force Microscopy (KPFM), and Electrostatic Force Microscopy (EFM), are summarized with focus on their principles and advances in measuring the electronic transport, ionic dynamics, the work functions and the surface charges of oxides.


Author(s):  
Kevin M. Shakesheff ◽  
Martyn C. Davies ◽  
Clive J. Roberts ◽  
Saul J. B. Tendler ◽  
Philip M. Williams

Author(s):  
Benedict Drevniok ◽  
St. John Dixon-Warren ◽  
Oskar Amster ◽  
Stuart L Friedman ◽  
Yongliang Yang

Abstract Scanning microwave impedance microscopy was used to analyze a CMOS image sensor sample to reveal details of the dopant profiling in planar and cross-sectional samples. Sitespecific capacitance-voltage spectroscopy was performed on different regions of the samples.


Author(s):  
Swaminathan Subramanian ◽  
Khiem Ly ◽  
Tony Chrastecky

Abstract Visualization of dopant related anomalies in integrated circuits is extremely challenging. Cleaving of the die may not be possible in practical failure analysis situations that require extensive electrical fault isolation, where the failing die can be submitted of scanning probe microscopy analysis in various states such as partially depackaged die, backside thinned die, and so on. In advanced technologies, the circuit orientation in the wafer may not align with preferred crystallographic direction for cleaving the silicon or other substrates. In order to overcome these issues, a focused ion beam lift-out based approach for site-specific cross-section sample preparation is developed in this work. A directional mechanical polishing procedure to produce smooth damage-free surface for junction profiling is also implemented. Two failure analysis applications of the sample preparation method to visualize junction anomalies using scanning microwave microscopy are also discussed.


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