scholarly journals New full‐wave rectifier based on modified voltage differencing transconductance amplifier

Author(s):  
Predrag B. Petrović
2011 ◽  
Vol 20 (02) ◽  
pp. 185-206 ◽  
Author(s):  
WORAPONG TANGSRIRAT ◽  
TATTAYA PUKKALANUN ◽  
WANLOP SURAKAMPONTORN

A synthesis of analog current limiter (CL) building blocks based on a current differencing transconductance amplifier (CDTA) is proposed. The breakpoint and the slope of the resulting transfer characteristic obtained from the proposed CDTA-based CL are electronically programmable through the external bias currents. To demonstrate versatility of the proposed electronically tunable CLs, some nonlinear applications to programmable current-mode precision full-wave rectifiers and piecewise-linear function approximation generators are also presented. PSPICE simulation and experimental results confirm the effectiveness of the proposed circuits.


2014 ◽  
Vol 23 (07) ◽  
pp. 1450101 ◽  
Author(s):  
FIRAT KAÇAR ◽  
MUHAMMED EMIN BAŞAK

In this paper, a new mixed mode full-wave rectifier which consists of a current differencing transconductance amplifier (CDTA), resistor and two complementary MOS transistor is presented. The proposed circuit is called as mixed mode because it can be used as current-, voltage-, transimpedance- and transconductance-mode rectifier depending on how the resistor is connected to the input or output of the circuit. The presented circuit has an appropriate zero crossing performance, linearity, low component count, and can be adapted to modern IC technologies. It is also suitable for monolithic integrated implementation. LTSPICE simulations with 0.18 μm CMOS model obtained through TMSC are included to verify the workability of the proposed circuit. We also performed noise and Monte Carlo analyses. Various simulation results are presented to show the effectiveness of the proposed circuit.


2013 ◽  
Vol 2013 ◽  
pp. 1-5 ◽  
Author(s):  
Neeta Pandey ◽  
Rajeshwari Pandey

This paper presents a current mode full-wave rectifier based on single modified Z copy current difference transconductance amplifier (MZC-CDTA) and two switches. The circuit is simple and is suitable for IC implementation. The functionality of the circuit is verified with SPICE simulation using 0.35 μm TSMC CMOS technology parameters.


Electronics ◽  
2021 ◽  
Vol 10 (11) ◽  
pp. 1262
Author(s):  
Niranjan Raj ◽  
Sagar ◽  
Rajeev Kumar Ranjan ◽  
Bindu Priyadarshini ◽  
Nicu Bizon

This work presents a voltage mode scheme of a full-wave precision rectifier circuit using an analog building block differential voltage current conveyor transconductance amplifier (DVCCTA) including five NMOS transistors. The proposed design is essentially suited for low voltage and high-frequency input signals. The operation of the proposed rectifier design depends upon the region of operation of NMOS transistors. The output waveform of the presented rectifier design can be made electronically tunable by controlling the bias voltage. The functional correctness and verification of the presented design are performed using 0.25-µm TSMC technology under the supply voltage of ±1.5 V. The absence of a resistor leads to a minimal parasitic effect. To obtain further insight on the robustness of the circuit, a Monte Carlo simulation and corner analysis are also presented. The circuit is verified experimentally by incorporating a breadboard model with the help of commercially available ICs CA3080 (operational transconductance amplifier) and AD844AN (current feedback operational amplifier) and offers remarkable compliance with both theoretical and simulation outcomes. The presented design has been laid out on Cadence virtuoso, which consumes a chip area of 9044 µm2.


Author(s):  
Nik Ahmad Zainal Abidin ◽  
◽  
Norkharziana Mohd Nayan ◽  
Azuwa Ali ◽  
N. A. Azli ◽  
...  

This research presents a simulation analysis for the AC-DC converter circuit with a different configurations of the array connection of the piezoelectric sensor. The selection of AC-DC converter circuits is full wave bridge rectifier (FWBR), parallel SSHI (P-SSHI) and parallel voltage multiplier (PVM) with array configuration variation in series (S), parallel (P), series-parallel (SP) and parallel-series (PS). The system optimizes with different load configurations ranging from 10 kΩ to 1 MΩ. The best configuration of AC-DC converter with an appropriate array piezoelectric connection producing the optimum output of harvested power is presented. According to the simulation results, the harvested power produced by using P-SSHI converter connected with 3 parallel piezoelectric transducer array was 85.9% higher than for PVM and 15.88% higher than FWBR.


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