Whose data is it, anyway? [data retention policy]

B. Little

doi:10.1049/inp:20070307

Responding to Policy Signals? An Experimental Study on Information about Policy Adoption and Data Retention Policy Support in Germany

Social Science Quarterly ◽

10.1111/ssqu.12931 ◽

2021 ◽

Author(s):

Eva‐Maria Trüdinger ◽

Achim Hildebrandt ◽

Sebastian Jäckle ◽

Jonas Löser

Keyword(s):

Experimental Study ◽

Policy Support ◽

Policy Adoption ◽

Data Retention ◽

Retention Policy

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Analysis of Retention Time Degradation Caused by Electrostatic Potential Variation between Adjacent Bit-Line and Adjacent Contact Node in DRAM

ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2016p0091 ◽

2016 ◽

Author(s):

Jungil Mok ◽

Byungki Kang ◽

Daesun Kim ◽

Hongsun Hwang ◽

Sangjae Rhee ◽

...

Keyword(s):

Electric Field ◽

Electrostatic Potential ◽

Critical Dimension ◽

Data Retention ◽

Signal Line ◽

Adjacent Node ◽

Storage Node ◽

Retention Characteristics ◽

Node Voltage ◽

The Relationship

Abstract Systematic retention failure related on the adjacent electrostatic potential is studied with sub 20nm DRAM. Unlike traditional retention failures which are caused by gate induced drain leakage or junction leakage, this failure is influenced by the combination of adjacent signal line and adjacent contact node voltage. As the critical dimension between adjacent active and the adjacent signal line and contact node is scaled down, the effect of electric field caused by adjacent node on storage node is increased gradually. In this paper, we will show that the relationship between the combination electric field of adjacent nodes and the data retention characteristics and we will demonstrate the mechanism based on the electrical analysis and 3D TCAD simulation simultaneously.

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Non-Visible Defect Analysis of OTP Device

ISTFA 2011: Conference Proceedings from the 37th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2011p0198 ◽

2011 ◽

Author(s):

C.Q. Chen ◽

G.B. Ang ◽

Z.X. Xing ◽

Y.N. Hua ◽

Z.Q. Mo ◽

...

Keyword(s):

Trap Center ◽

Data Retention ◽

Auger Analysis ◽

Cross Sectional ◽

Critical Dimensions ◽

Charge Trap ◽

Root Cause ◽

Transmission Electron ◽

Electrical Analysis ◽

Visible Defect

Abstract Several product lots were found to suffer from data retention failures in OTP (one time program) devices. PFA (physical failure analysis) was performed on these devices, but nothing abnormal was observed. Cross-sectional TEM (transmission electron microscopy) revealed no physical defects or abnormal CDs (critical dimensions). In order to isolate the failed layer or location, electrical analysis was conducted. Several electrical simulation experiments, designed to test the data retention properties of OTP devices, were preformed. Meilke's method [1] was also used to differentiate between mobile ion contamination and charge trap centers. Besides Meilke's method, a new electrical analysis method was used to verify the analysis results. The results of our analysis suggests that SiN charge trap centers are the root cause for the data retention failures, and the ratio of Si/N is the key to charge trap center formation. Auger analysis was used to physically check the Si/N ratio of OTP devices. The results support our hypothesis. Subsequent DOE (Design Of Experiment) experiments also confirm our analysis results. Key Words: OTP, data retention, Non-visible defect, AFP, charge trap center, mobile ion.

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Nanoprobing Application on Characterization of 6T-SRAM Single Bit Failures with Different Gox Breakdown Defect

ISTFA 2006: Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2006p0517 ◽

2006 ◽

Author(s):

Cheng-Piao Lin ◽

Chin-Hsin Tang ◽

Cheng-Hsu Wu ◽

Cheng-Chun Ting

Keyword(s):

Copper Metallization ◽

Physical Analysis ◽

Electrical Characteristics ◽

Gate Leakage Current ◽

Data Retention ◽

Simulation Data ◽

Failure Data ◽

Dual Gate ◽

Soft Breakdown

Abstract This paper analyzes several SRAM failures using nano-probing technique. Three SRAM single bit failures with different kinds of Gox breakdown defects analyzed are gross function single bit failure, data retention single bit failure, and special data retention single bit failure. The electrical characteristics of discrete 6T-SRAM cells with soft breakdown are discussed and correlated to evidences obtained from physical analysis. The paper also verifies many previously published simulation data. It utilizes a 6T-SRAM vehicle consisting of a large number of SRAM cells fabricated by deep sub-micron, dual gate, and copper metallization processes. The data obtained from this paper indicates that Gox breakdown location within NMOS pull-down device has larger a impact on SRAM stability than magnitude of gate leakage current, which agrees with previously published simulation data.

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