Nanoprobing Application on Characterization of 6T-SRAM Single Bit Failures with Different Gox Breakdown Defect

2006 ◽  
Author(s):  
Cheng-Piao Lin ◽  
Chin-Hsin Tang ◽  
Cheng-Hsu Wu ◽  
Cheng-Chun Ting
Keyword(s):  
Copper Metallization ◽  
Physical Analysis ◽  
Electrical Characteristics ◽  
Gate Leakage Current ◽  
Data Retention ◽  
Simulation Data ◽  
Failure Data ◽  
Dual Gate ◽  
Soft Breakdown

Abstract This paper analyzes several SRAM failures using nano-probing technique. Three SRAM single bit failures with different kinds of Gox breakdown defects analyzed are gross function single bit failure, data retention single bit failure, and special data retention single bit failure. The electrical characteristics of discrete 6T-SRAM cells with soft breakdown are discussed and correlated to evidences obtained from physical analysis. The paper also verifies many previously published simulation data. It utilizes a 6T-SRAM vehicle consisting of a large number of SRAM cells fabricated by deep sub-micron, dual gate, and copper metallization processes. The data obtained from this paper indicates that Gox breakdown location within NMOS pull-down device has larger a impact on SRAM stability than magnitude of gate leakage current, which agrees with previously published simulation data.

Design and Characterization of a Novel Dual-Gate 3.3 Kv 4H-Sic JFET

2013 ◽  
Vol 740-742 ◽  
pp. 938-941
Author(s):  
Florian Chevalier ◽  
P. Brosselard ◽  
D. Tournier ◽  
G. Grosset ◽  
L. Dupuy ◽  
...  
Keyword(s):  
Design Methodology ◽  
Vertical Channel ◽  
Optimal Structure ◽  
Electrical Characteristics ◽  
Gate Electrode ◽  
Thermal Oxide ◽  
Dual Gate

This paper presents the methodology for the design of a novel 4H-SiC JFET structure able to sustain 3.3 kV. Comparisons between simulation and characterization res will be made. Taken into account the process limitation, we will also discuss the critical steps and their impact on the electrical characteristics. A design methodology based on Baliga's criterion is proposed to obtain the optimal structure. A 50 nm thick thermal oxide grown above vertical channel and the use of a buried p+ layer as second gate electrode are brand new in front of what is found in literature.

Characterization of 4H-SiC PiN Diodes Formed on Defects Identified by PL Imaging

2016 ◽  
Vol 858 ◽  
pp. 405-409 ◽  
Author(s):  
Yeganeh Bonyadi ◽  
Peter M. Gammon ◽  
Roozbeh Bonyadi ◽  
Vishal Ajit Shah ◽  
C.A. Fisher ◽  
...  
Keyword(s):  
Leakage Current ◽  
Electrical Characteristics ◽  
Pin Diodes ◽  
Turn On ◽  
State Behaviour ◽  
P Type ◽  
Soft Breakdown ◽  
Current Behaviour

In this paper the results of a study in which the surface quality of 30, 35 and 110 µm 4H-SiC epitaxial layers from different manufacturers are evaluated using AFM and photoluminescence (PL) imaging. PiN diodes are then intentionally fabricated on triangular defects and polytypes grains which are formed, in order to understand their impact on the resulting electrical characteristics, which includes on-state behaviour, turn-on characteristics and reverse leakage current behaviour. The results indicate that the defects form a high resistance short through the p-type anode. This results in higher leakage current, well over 108 times higher than the devices formed off-defect. PiN diodes fabricated on-defect also suffered from soft breakdown unlike those off-defect.

Structural and Electrical Characterization of Shaped Beam Laser Recrystallized Polysilicon on Amorphous Substrates

1981 ◽  
Vol 4 ◽  
Author(s):  
T. J. Stultz ◽  
J. F. Gibbons
Keyword(s):  
Grain Size ◽  
Electrical Characterization ◽  
Grain Structure ◽  
Electrical Characteristics ◽  
Shaped Beam ◽  
Beam Laser ◽  
Cw Laser ◽  
Amorphous Substrates ◽  
Circular Beam

ABSTRACTStructural and electrical characterization of laser recrystallized LPCVD silicon films on amorphous substrates using a shaped cw laser beam have been performed. In comparing the results to data obtained using a circular beam, it was found that a significant increase in grain size can be achieved and that the surface morphology of the shaped beam recrystallized material was much smoother. It was also found that whereas circular beam recrystallized material has a random grain structure, shaped beam material is highly oriented with a <100> texture. Finally the electrical characteristics of the recrystallized film were very good when measured in directions parallel to the grain boundaries.

Fabrication and Characterization of Ferroelectric Polymer/TiO2/Al-doped ZnO Structures

2008 ◽  
Vol 1071 ◽  
Author(s):  
Koji Aizawa
Keyword(s):  
Leakage Current ◽  
Vinylidene Fluoride ◽  
Ferroelectric Properties ◽  
Hysteresis Loops ◽  
Tio2 Films ◽  
Gate Leakage Current ◽  
Poly Vinylidene Fluoride ◽  
Doped Zno ◽  
Fabrication And Characterization

AbstractCharacterization of 700-nm-thick poly(vinylidene fluoride/trifluoroethylene) [P(VDF/TrFE)]/TiO2/Al-doped ZnO (AZO) structures on a glass substrate were investigated. In this study, the sputtered TiO2 films as insulator were used for the reduction of leakage current. The leakage current density of the fabricated Pt/P(VDF/TrFE)/AZO and Pt/P(VDF/TrFE)/170-nm-thick TiO2/AZO structures were approximately 8.7 and 3.9 nA/cm2 at the applied voltage of 10 V, respectively. In the polarization vs. voltage characteristics, the fabricated Pt/P(VDF/TrFE)/TiO2/AZO structures showed hysteresis loops caused by ferroelectric polarization. The remnant polarization (2Pr) and coercive voltage (2Vc) measured from a saturated hysteresis loop at the frequency of 50 Hz were approximately 12 μC/cm2 and 105 V, respectively. These results suggest that the insertion of TiO2 film is available for reducing the gate leakage current without changing the ferroelectric properties.

scholarly journals Photovoltaic effect in Light Emitting Diodes

2016 ◽  
Vol 1 (1) ◽  
pp. 30-36
Author(s):  
K. Remidi ◽  
A. Cheknane ◽  
M. Haddadi
Keyword(s):  
Theoretical Model ◽  
Experimental Work ◽  
Photovoltaic Effect ◽  
Research Work ◽  
Electrical Characterization ◽  
Experimental System ◽  
Photoelectric Effect ◽  
Electrical Characteristics ◽  
Light Emitting

This paper describes an experimental work on the electrical characterization of commercial LED of different colors and their photoelectric effect. A research work has been carried out to develop the experimental measurement in order to show the presence of a photovoltaic effect on LEDs. For this purpose, we measured the electrical characteristics of individual LED and studied their light intensities using a pyranometer EPLEY. This work focused mainly on red, green and yellowLEDs. Moreover, we have implemented an experimental system for the measurement of sensitivity of different LEDs depending on the power of light from a light source. A comparison was made between theoretical model and experimental results.

Physical analysis of hard and soft breakdown failures in ultrathin gate oxides

2002 ◽  
Vol 42 (4-5) ◽  
pp. 565-571 ◽  
Author(s):  
M.K. Radhakrishnan ◽  
K.L. Pey ◽  
C.H. Tung ◽  
W.H. Lin
Keyword(s):  
Physical Analysis ◽  
Gate Oxides ◽  
Soft Breakdown

Device and Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Cells Comprising D- and E-Mode HEMTs

2019 ◽  
Vol 28 (supp01) ◽  
pp. 1940009
Author(s):  
Aleš Chvála ◽  
Lukáš Nagy ◽  
Juraj Marek ◽  
Juraj Priesol ◽  
Daniel Donoval ◽  
...  
Keyword(s):  
Dynamic Performance ◽  
High Electron Mobility Transistors ◽  
Logic Circuits ◽  
High Electron ◽  
Enhancement Mode ◽  
Electron Mobility Transistors ◽  
Dual Gate ◽  
Logic Cells ◽  
First Time

This paper presents monolithic integrated InAlN/GaN NAND and NOR logic cells comprising depletion-mode, enhancement-mode and dual-gate enhancement-mode high electron mobility transistors (HEMTs). The designed NAND and NOR logic cells consist of the depletion-mode and enhancement-mode HEMT transistors integrated onto a single die. InAlN/GaN-based NAND and NOR logic cells with good static and dynamic performance are demonstrated for the first time. Calibrated static and dynamic electrophysical models are proposed for 2D device simulations in Sentaurus Device environment. Sentaurus Device mixed-mode setup interconnects the transistors to NAND and NOR logic circuits which allows analysis and characterization of the devices as a complex system. Circuit models of depletion-mode, enhancement-mode and dual-gate HEMTs are designed and calibrated by experimental results and 2D device simulations. The proposed models exhibit highly accurate results.

Characterization of process-induced mobile ions on the data retention in flash memory

2003 ◽  
Vol 50 (4) ◽  
pp. 995-1000 ◽  
Author(s):  
J.J. Liou ◽  
Chih-Jen Huang ◽  
Hwi-Huang Chen ◽  
G. Hong
Keyword(s):  
Flash Memory ◽  
Data Retention ◽  
Mobile Ions

Deep Level Characterization of LP-MOCVD Grown Al0.48In0.52As

1993 ◽  
Vol 325 ◽  
Author(s):  
F. Ducroquet ◽  
G. Guillot ◽  
K. Hong ◽  
C.H. Hong ◽  
D. Pavlidis ◽  
...  
Keyword(s):  
Deep Level ◽  
Shallow Donor ◽  
Electrical Characteristics ◽  
Oxygen Contamination ◽  
Deep Donor ◽  
Low Pressure Mocvd ◽  
Different Origins ◽  
Inp Substrates ◽  
Preferential Incorporation

AbstractDeep levels in unintentionally doped A10. 48In0.52As layers epitaxially grown on InP substrates by low-pressure MOCVD have been investigated as a function of growth temperature (Tg ranging from 570 to 690°C). Two different origins for the residual carrier concentration are deduced depending on Tg: i) low growth temperatures favor the creation of a deep donor located at Ec-(0.13±0.04)eV; ii) At higher Tg, a preferential incorporation of a shallow donor occurs, which can be attributed to silicon by SIMS measurements. The oxygen contamination deduced by SIMS and the electrical characteristics of the AlInAs layers do not appear to be correlated.

Sign in / Sign up

Export Citation Format

Share Document