Digital signal processing (DSP) applications in FT-IR. Implementation examples for rapid and step scan systems

1998 ◽  
Author(s):  
Raúl Curbelo
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Digital Signal ◽  
Ft Ir ◽  
Dsp Applications

Approximate Compressor-Based Multiplier Design Methodology for Error-Resilient Digital Signal Processing

2020 ◽  
Vol 29 (14) ◽  
pp. 2050233
Author(s):  
Zhixi Yang ◽  
Xianbin Li ◽  
Jun Yang
Keyword(s):  
Image Processing ◽  
Signal Processing ◽  
Digital Signal Processing ◽  
Resource Utilization ◽  
Finite Impulse Response ◽  
Digital Signal ◽  
Fir Filter ◽  
Electrical Performance ◽  
Approximate Computing ◽  
Dsp Applications

As many digital signal processing (DSP) applications such as digital filtering are inherently error-tolerant, approximate computing has attracted significant attention. A multiplier is the fundamental component for DSP applications and takes up the most part of the resource utilization, namely power and area. A multiplier consists of partial product arrays (PPAs) and compressors are often used to reduce partial products (PPs) to generate the final product. Approximate computing has been studied as an innovative paradigm for reducing resource utilization for the DSP systems. In this paper, a 4:2 approximate compressor-based multiplier is studied. Approximate 4:2 compressors are designed with a practical design criterion, and an approximate multiplier that uses both truncation and the proposed compressors for PP reduction is subsequently designed. Different levels of truncation and approximate compression combination are studied for accuracy and electrical performance. A practical selection algorithm is then leveraged to identify the optimal combinations for multiplier designs with better performance in terms of both accuracy and electrical performance measurements. Two real case studies are performed, i.e., image processing and a finite impulse response (FIR) filter. The design proposed in this paper has achieved up to 16.96% and 20.81% savings on power and area with an average signal-to-noise ratio (SNR) larger than 25[Formula: see text]dB for image processing; similarly, with a decrease of 0.3[Formula: see text]dB in the output SNR, 12.22% and 30.05% savings on power and area have been achieved for an FIR filter compared to conventional multiplier designs.

Digital Signal Processing for Step-Scan Fourier Transform Infrared Photoacoustic Spectroscopy

1997 ◽  
Vol 51 (4) ◽  
pp. 453-460 ◽  
Author(s):  
David L. Drapcho ◽  
Raul Curbelo ◽  
Eric Y. Jiang ◽  
Richard A. Crocombe ◽  
William J. McCarthy
Keyword(s):  
Signal Processing ◽  
Fourier Transform ◽  
Digital Signal Processing ◽  
Phase Modulation ◽  
Modulation Frequency ◽  
Digital Signal ◽  
Sampling Depth ◽  
Ft Ir ◽  
Infrared Photoacoustic Spectroscopy ◽  
Additional Hardware

A software-based digital signal processing (DSP) method using the data system processor has been developed to demodulate the photoacoustic responses of a sample to the fundamental phase modulation frequency and its harmonic frequencies (up to the ninth harmonic) in step-scan FT-IR photoacoustic measurements, without the use of any additional hardware. The DSP algorithm and its sampling depth multiplexing advantages are compared to conventional hardware demodulation. Comparison of results from the DSP method to those from hardware demodulators are shown at both the phase modulation frequency and the harmonics, and application of the DSP method to step-scan photoacoustic measurements with phase modulation is discussed as it applies to obtaining depth profile information in heterogeneous materials.

Polarization Modulation Fourier Transform Infrared Spectroscopy with Digital Signal Processing: Comparison of Vibrational Circular Dichroism Methods

2001 ◽  
Vol 55 (11) ◽  
pp. 1435-1447 ◽  
Author(s):  
Jovencio Hilario ◽  
David Drapcho ◽  
Raul Curbelo ◽  
Timothy A. Keiderling
Keyword(s):  
Signal Processing ◽  
Circular Dichroism ◽  
Digital Signal Processing ◽  
Digital Signal ◽  
Vibrational Circular Dichroism ◽  
Polarization Modulation ◽  
Rapid Scan ◽  
Ft Ir ◽  
Lock In ◽  
Circular Dichroïsm

Digital signal processing (DSP) has been implemented in a step-scan FT-IR spectrometer in a modification that enables processing of high-frequency polarization modulation signals. In this work, direct comparison is made between vibrational circular dichroism (VCD) spectra measured on the same instrument, with the same samples, under the same conditions, using this new DSP method and a conventional rapid-scan technique (employing a lock-in amplifier for demodulation). In this initial test, both techniques generated high-quality VCD for solution phase, rigid chiral molecules such α-pinene and camphor. Noise and reproducibility of known spectral features, as well as enhancing signal measurability and discrimination, were used as criteria for the selection of optimal DSP measurement parameters. Both DSP and rapid-scan VCD methods produced qualitatively reasonable spectra for biologically related molecules such as poly-γ-benzyl-L-glutamate, poly-L-proline, and duplex RNA homopolymer. In most cases, the DSP method had a slight signal-to-noise advantage based on standard deviations of the noise trace data over the rapid-scan measurement, but the final results did depend on the details of the data collection and the phase correction methods inherent in both methods.

scholarly journals Design of High Speed and Low Area Confined Multiplier on FPGA

2021 ◽  
Vol 11 (4) ◽  
pp. 2736-2746
Author(s):  
Kandagatla Ravi Kumar ◽  
Cheeli Priyadarshini ◽  
Kanakam Bhavani ◽  
Ankam Varun Sundar Kumar ◽  
Palanki Naga Nanda Sai
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Field Programmable Gate Array ◽  
High Speed ◽  
Digital Signal ◽  
Low Area ◽  
Field Programmable ◽  
Dsp Applications ◽  
Advanced Applications ◽  
Main Factor

In this Advanced world, Technology is playing the major role. Most importantly development in Electronics field has a large impact on the improved life style. Among the advanced applications, DSP ranks first in place. Multipliers are the most basic elements that are widely used in the Digital Signal Processing (DSP) applications. Therefore, the design of the multiplier is the main factor for the performance of the device. Using RTL simulation and a Field Programmable Gate Array (FPGA), we compare the performance of a serial multiplier with an advanced multiplier. Many single bit adders are removed and replaced with multiplexers in this project. So that the less often used FPGAs are fully used by occupying fewer divisions and slices. The use of multiplier architecture results in significant reductions in FPGA resources, latency, area, and power. These multiplication approaches are created utilizing RTL simulation in Xilinx ISE simulator and synthesis in Xilinx ISE 14.7. Finally, the Spartan 3E FPGA is used to implement the design.

scholarly journals Analysis and Evaluation of MAC Operators for Fast Fourier Transformation

2018 ◽  
Vol 7 (01) ◽  
pp. 01-07
Author(s):  
Prof. Deepanita Mondal
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Fourier Transformation ◽  
Digital Signal ◽  
Fast Fourier Transformation ◽  
Analysis And Evaluation ◽  
Dsp Applications

Arithmetic tasks are broadly utilized in Digital Signal Processing (DSP) applications. In this paper, a streamlined plan of the melded Add-Multiply (FAM) administrators is being investigated for the expanding execution. The direct plan of an AM unit is executed by apportioning a snake and afterward driving its yield to the contribution of a multiplier, increments essentially both region and basic way postponement of the circuit. The immediate recoding of the entirety of two numbers in its MB structure prompts a progressively effective execution of the intertwined Add-Multiply unit contrasted with the regular one, earlier recoding plans depend on complex controls in bit-level, which are actualized by committed circuits in entryway level. This new recoding plan and Modified CSA Tree, diminishes the basic way delay and decreases power utilization. This paper focuses on the extra decrease of dormancy and force utilization of CSA tree multiplier. This is cultivated by the utilization of Modified stall ADD-Multiply administrator and 4:2 compressor adders. Three elective plans of the proposed S-MB approach utilizing regular and marked piece Full Adders (FAs) and Half Adders (HAs) are being investigated as building squares.

scholarly journals An Efficient Reverse Converter for the Four Non Coprime Moduli Set {2n,2n-1,2n-2,2n-3}

2021 ◽  
Vol 10 (1) ◽  
pp. 29-34
Author(s):  
Valentine Aveyom ◽  
Abdul Barik Alhassan ◽  
Paula Aninyie Wumnaya
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Hardware Implementation ◽  
Dynamic Range ◽  
State Of The Art ◽  
Common Factor ◽  
Digital Signal ◽  
Reverse Converter ◽  
Dsp Applications

In this paper, residue to binary conversion is presented for the four moduli setsharing a common factor. A new and efficient converter for the moduli set using multipliers, carry saves and modular adders is proposed based on a cyclic jump approach. A theoretical hardware implementation and comparison with a state-of- the- art scheme showed that the proposed scheme performed better. The 4- moduli set selected provides a larger dynamic range which is needed for Digital Signal Processing (DSP) applications [7].

Step-Scanning Interferometer with Digital Signal Processing

1993 ◽  
Vol 47 (9) ◽  
pp. 1345-1349 ◽  
Author(s):  
Christopher J. Manning ◽  
Peter R. Griffiths
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Digital Signal Processor ◽  
Modulation Frequency ◽  
Depth Profiling ◽  
Digital Signal ◽  
Scanning Interferometer ◽  
Ft Ir ◽  
Lock In ◽  
Signal Processor

A novel step-scan FT-IR spectrometer incorporating a digital signal processor for demodulation of the detector signal is described. The potential advantages of this method of signal processing are discussed and illustrated. The instrument is based on a commercial cube-corner interferometer which has been modified by replacement of the drive motor with a stepper motor-micrometer and piezoelectric transducer combination. The interferometer retardation is feedback controlled by a 486–50 personal computer, which also controls the digital signal processor and collects spectral data. More than one phase modulation frequency can be imposed simultaneously, allowing for a multiplex advantage in photoacoustic depth profiling. Digital signal processing allows for simultaneous demodulation of multiple frequencies which would normally require several lock-in amplifiers. Data that illustrate the feasibility of these concepts are presented. The suitability of this instrument for double-modulation step-scan FT-IR measurements such as polymer stretching and electrochemically modulated step-scan FT-IR is also discussed.

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