Ball Grid Array (BGA) Solder Joint Intermittency Detection: SJ BIST

Author(s):  
James P. Hofmeister ◽  
Pradeep Lall ◽  
Dhananjay Panchagade ◽  
Norman N. Roth ◽  
Terry A. Tracy ◽  
...  
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2018 ◽  
Vol 2018 (1) ◽  
pp. 000534-000542
Author(s):  
Ephraim Suhir ◽  
Sung Yi ◽  
Jennie S. Hwang ◽  
R. Ghaffarian

Abstract The “head-in-pillow” (HnP) defects in lead-free solder joint interconnections of IC packages with conventional (small) stand-off heights of the solder joints, and particularly in packages with fine pitches, are attributed by many electronic material scientists to the three major causes: 1) attributes of the manufacturing process, 2) solder material properties and 3)design-related issues. The latter are thought to be caused primarily by elevated stresses in the solder material, as well as by the excessive warpage of the PCB-package assembly and particularly to the differences in the thermally induced curvatures of the PCB and the package. In this analysis the stress-and-warpage issue is addressed using an analytical predictive stress model. This model is a modification and an extension of the model developed back in 1980-s by the first author. It is assumed that it is the difference in the post-fabrication deflections of the PCB-package assembly that is the root cause of the solder materials failures and particularly and perhaps the HnP defects. The calculated data based on the developed analytical thermal stress model suggest that the replacement of the conventional ball-grid-array (BGA) designs with designs characterized by elevated stand-off heights of the solder joints could result in significant stress and warpage relief and, hopefully, in a lower propensity of the IC package to HnP defects as well. The general concepts are illustrated by a numerical example, in which the responses to the change in temperature of a conventional design referred to as ball-grid-array (BGA) and a design with solder joints with elevated stand-off heights referred to as column-grid-array (CGA) are compared. The computed data indicated that the effective stress in the solder material is relieved by about 40% and the difference between the maximum deflections of the PCB and the package is reduced by about 60%, when the BGA design is replaced by a CGA system. Although no proof that the use of solder joints with elevated stand-off heights will lessen the package propensity to the HnP defects is provided, the authors think that there is a reason to believe that the application of solder joints with elevated stand-off heights could result in a substantial improvement in the general IC package performance, including, perhaps, its propensity to HnP defects.


Author(s):  
Krishna Tunga ◽  
James Pyland ◽  
Raghuram V. Pucha ◽  
Suresh K. Sitaraman

Various constitutive and fatigue-life predictive models for lead-tin solders in SBGA (Super Ball Grid Array) packages are studied and compared with the results from experimental data. Two solder compositions, 62Sn/36Pb/2Ag and 63Sn/37Pb are studied in this work. The fatigue life of 62Sn/36Pb/2Ag solder is studied using different constitutive models that take into consideration both the time-independent and time-dependent behavior of the solder. The fatigue life of 62Sn/36Pb/2Ag solder is predicted using an energy-based predictive model and compared with the experimental data. The choice of various predictive models on the solder joint life is studied using 63Sn/37Pb solder. Various predictive models, available in the literature, for eutectic and near eutectic solder compositions are studied to predict the fatigue life. Guidelines are provided for selecting constitutive and predictive models with appropriate damage metrics.


Author(s):  
Saketh Mahalingam ◽  
Ashutosh Joshi ◽  
Joseph Lacey ◽  
Kunal Goray

Chip Scale Packages (CSP) are ideal intermediates between Direct Chip Attach (DCA) and Ball Grid Array (BGA) technologies in terms of both size and cost. Depending upon the application, chip scale packages are either underfilled for better solder joint reliability or are attached with a heat sink to keep the operating temperature of the chip under control. In many applications, as discussed in this paper, both an underfill and a heat sink are required. Quite expectedly the addition of two more materials, heat sink and adhesive, in the board level assembly results in fresh reliability concerns. In particular, the requirements on the underfill material and the heat sink attach adhesive are more rigorous and needless to say, a proper understanding of process and material issues is needed to make such a choice. The inelastic strains experienced by the solder joint (related to the underfill) and the peeling stresses at the heat sink attach adhesive interfaces (related to the thermal adhesive) are used as metric for comparing the number of material choices that are available. Based on the results, it is shown that it is important to choose materials that are thermo-mechanically matched with the rest of the system.


1999 ◽  
Vol 123 (2) ◽  
pp. 127-131 ◽  
Author(s):  
Kuo-Ning Chiang ◽  
Chang-Ming Liu

As electronic packaging technology moving to the CSP, wafer level packaging, fine pitch BGA (ball grid array) and high density interconnections, the wireability of the PCB/substrate and soldering technology are as important as reliability issues. In this work, a comparison of elliptical/round pads of area array type packages has been studied for soldering, reliability, and wireability requirements. The objective of this research is to develop numerical models for predicting reflow shapes of solder joint under elliptical/round pad boundary conditions and to study the reliability issue of the solder joint. In addition, a three-dimensional solder liquid formation model is developed for predicting the geometry, the restoring force, the wireability, and the reliability of solder joints in an area array type interconnections (e.g., ball grid array, flip chip) under elliptical and round pad configurations. In general, the reliability of the solder joints is highly dependent on the thermal-mechanical behaviors of the solder and the geometry configuration of the solder ball. These reliability factors include standoff height/contact angle of the solder joint, and the geometry layout/material properties of the package. An optimized solder pad design cannot only lead to a good reliability life of the solder joint but also can achieve a better wireability of the substrate. Furthermore, the solder reflow simulation used in this study is based on an energy minimization engine called Surface Evolver and the finite element software ABAQUS is used for thermal stress/strain nonlinear analysis.


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