Impacts of Ferroelectric Parameters on the Electrical Characteristics of Fefet for Low-Power Logic and Memory Applications

2021 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic52283.2021.9461542 ◽

2021 ◽

Author(s):

Kaifeng Wang ◽

Qianqian Huang ◽

Chang Su ◽

Liang Chen ◽

Mengxuan Yang ◽

...

Keyword(s):

Low Power ◽

Electrical Characteristics ◽

Memory Applications ◽

Low Power Logic

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(Invited) Technology Breakthrough by Ferroelectric HfO2 for Low Power Logic and Memory Applications

ECS Meeting Abstracts ◽

10.1149/ma2018-02/16/695 ◽

2018 ◽

Keyword(s):

Low Power ◽

Memory Applications ◽

Low Power Logic

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Scaled III-V-on-Si transistors for low-power logic and memory applications

Japanese Journal of Applied Physics ◽

10.35848/1347-4065/abd707 ◽

2020 ◽

Author(s):

Daniele Caimi ◽

Marilyne Sousa ◽

Siegfried Karg ◽

Cezar Zota

Keyword(s):

Low Power ◽

Memory Applications ◽

Low Power Logic

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(Invited) Technology Breakthrough by Ferroelectric HfO2 for Low Power Logic and Memory Applications

ECS Transactions ◽

10.1149/08602.0021ecst ◽

2018 ◽

Vol 86 (2) ◽

pp. 21-25

Author(s):

Masaharu Kobayashi

Keyword(s):

Low Power ◽

Memory Applications ◽

Low Power Logic

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Partition Based Product Term Retiming for Reliable Low Power Logic Structure

Advances in Intelligent Systems and Computing - Advances in Information and Communication Networks ◽

10.1007/978-3-030-03402-3_13 ◽

2018 ◽

pp. 178-189

Author(s):

S. Jalaja ◽

A. M. Vijaya Prakash

Keyword(s):

Low Power ◽

Product Term ◽

Low Power Logic ◽

Logic Structure

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Impact of HfO2 buffer layer on the electrical characteristics of ferroelectric/high-k gate stack for nonvolatile memory applications

Applied Physics A ◽

10.1007/s00339-020-03632-0 ◽

2020 ◽

Vol 126 (6) ◽

Author(s):

Rajesh Kumar Jha ◽

Prashant Singh ◽

Upendra Kashniyal ◽

Manish Goswami ◽

B. R. Singh

Keyword(s):

Buffer Layer ◽

Nonvolatile Memory ◽

Electrical Characteristics ◽

High K ◽

Memory Applications

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The electrical characteristics of metal-ferroelectric (PbZr/sub x/Ti/sub 1-x/O/sub 3/)-insulator(Ta/sub 2/O/sub 5/)-silicon structure for non-volatile memory applications

2000 International Semiconducting and Insulating Materials Conference. SIMC-XI (Cat. No.00CH37046) ◽

10.1109/sim.2000.939259 ◽

2002 ◽

Author(s):

Chi-Yuan Sze ◽

J.Y. Lee

Keyword(s):

Electrical Characteristics ◽

Silicon Structure ◽

Non Volatile Memory ◽

Volatile Memory ◽

Memory Applications

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Selectively clocked skewed logic (SCSL): a robust low-power logic style for high-performance applications

ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581) ◽

10.1109/lpe.2001.945414 ◽

2002 ◽

Author(s):

N. Sirisantana ◽

A. Cao ◽

S. Davidson ◽

Cheng-Kok Koh ◽

K. Roy

Keyword(s):

Low Power ◽

High Performance ◽

Low Power Logic

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Low power and stable resistive switching in graphene oxide-based RRAM embedded with ZnO nanoparticles for nonvolatile memory applications

Journal of Materials Science Materials in Electronics ◽

10.1007/s10854-021-06287-6 ◽

2021 ◽

Author(s):

Rakesh Singh ◽

Ravi Kumar ◽

Anil Kumar ◽

Dinesh Kumar ◽

Mukesh Kumar

Keyword(s):

Graphene Oxide ◽

Low Power ◽

Resistive Switching ◽

Zno Nanoparticles ◽

Nonvolatile Memory ◽

Memory Applications

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Opportunities and Challenges of Emerging Nanotechnologies for Future High-Speed and Low-Power Logic Applications

2005 IEEE Conference on Electron Devices and Solid-State Circuits ◽

10.1109/edssc.2005.1635194 ◽

2006 ◽

Author(s):

R. Chau

Keyword(s):

Low Power ◽

Low Power Logic

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Novel III-N heterostructure devices for low-power logic and more

2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO) ◽

10.1109/nano.2016.7751336 ◽

2016 ◽

Author(s):

P. Fay ◽

W. Li ◽

L. Cao ◽

K. Pourang ◽

S. M. Islam ◽

...

Keyword(s):

Low Power ◽

Low Power Logic ◽

Heterostructure Devices

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