A fast transient output-capacitor-free low-dropout regulator with class-AB control stage

2014 ◽  
Author(s):  
Min Tan ◽  
Wing-Hung Ki
Keyword(s):  
Class Ab ◽  
Control Stage ◽  
Fast Transient ◽  
Low Dropout Regulator ◽  
Output Capacitor

A Fast-Transient low-dropout regulator (LDO) With Super Class-AB OTA

2021 ◽  
pp. 154035
Author(s):  
Lanya Yu ◽  
Qisheng Zhang ◽  
Xiao Zhao ◽  
Boran Wen ◽  
Liyuan Dong ◽  
...  
Keyword(s):  
Class Ab ◽  
Fast Transient ◽  
Low Dropout Regulator

Transient Response Enhancement with Fast Transient Controller for Capacitor-Less LDO Regulator

2014 ◽  
Vol 543-547 ◽  
pp. 800-805 ◽  
Author(s):  
Shang Sheng Chi ◽  
Wei Hu ◽  
Ming Hui Fan ◽  
Yu Sen Xu ◽  
Guo Lin Chen
Keyword(s):  
Transient Response ◽  
Output Voltage ◽  
Input Voltage ◽  
Settling Time ◽  
Voltage Range ◽  
Class Ab ◽  
Response Enhancement ◽  
Fast Transient ◽  
Low Dropout Regulator ◽  
Ldo Regulator

This paper presents a capacitor-less CMOS low dropout regulator (LDO) with a push-pull class AB amplifier, and a fast transient controller to achieve a better transient response. The undershoot/overshoot voltage and the settling time are effectively reduced. Through the theoretical analysis of the circuit, cadence simulation with SMIC 0.18μm process and under the condition of the input voltage range 1.4~4 V shows the output voltage is 1.2 V, with the fast controller the total quiescent current is 8.2 μA, the undershoot /overshoot voltage is 97 mV/47 mV and the settling time is 0.3 μs as load current suddenly changes from 1 to 100 mA, or vice versa. Compared with this paper without fast transient controller, the undershoot voltage, the overshoot voltage and the settling time are enhanced by 30%, 64% and 80%, respectively.

A LOW DROPOUT REGULATOR WITH LOW QUIESCENT CURRENT AND HIGH POWER SUPPLY REJECTION OVER WIDE RANGE OF FREQUENCY FOR SOC

2011 ◽  
Vol 20 (01) ◽  
pp. 1-13 ◽  
Author(s):  
CHENCHANG ZHAN ◽  
WING-HUNG KI
Keyword(s):  
High Power ◽  
Power Supply ◽  
Cmos Process ◽  
High Loop ◽  
Wide Range ◽  
Quiescent Current ◽  
Low Dropout Regulator ◽  
Output Capacitor ◽  
Large Output ◽  
Supply Rejection

A CMOS low quiescent current low dropout regulator (LDR) with high power supply rejection (PSR) and without large output capacitor is proposed for system-on-chip (SoC) power management applications. By cascoding a power NMOS with the PMOS pass transistor, high PSR over a wide frequency range is achieved. The gate-drive of the cascode NMOS is controlled by an auxiliary LDR that draws only 1 μA from a small charge pump, thus helping in reducing the quiescent current. Adaptive biasing is employed for the multi-stage error amplifier of the core LDR to achieve high loop gain hence high PSR at low frequency, low quiescent current at light load and high bandwidth at heavy load. A prototype of the proposed high-PSR LDR is fabricated using a standard 0.35 μm CMOS process, occupying an active area of 0.066 mm2. The lowest supply voltage is 1.6 V and the preset output voltage is 1.2 V. The maximum load current is 10 mA. The measured worst-case PSR at full load without using large output capacitor is -22.7 dB up to 60 MHz. The line and load regulations are 0.25 mV/V and 0.32 mV/mA, respectively.

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