Program circuit for a phase change memory array with 2 MB/s write throughput for embedded applications

Author(s):  
G. De Sandre ◽  
L. Bettini ◽  
E. Calvetti ◽  
G. Giacomi ◽  
M. Pasotti ◽  
...  
2012 ◽  
Vol 12 (10) ◽  
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Yan Liu ◽  
Zhitang Song ◽  
Bo Liu ◽  
Jia Xu ◽  
Houpeng Chen ◽  
...  

2015 ◽  
Vol 111 ◽  
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Paola Zuliani ◽  
Elisabetta Palumbo ◽  
Massimo Borghi ◽  
Giovanna Dalla Libera ◽  
Roberto Annunziata

ACS Nano ◽  
2015 ◽  
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pp. 4120-4128 ◽  
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Beom Ho Mun ◽  
Byoung Kuk You ◽  
Se Ryeun Yang ◽  
Hyeon Gyun Yoo ◽  
Jong Min Kim ◽  
...  

2019 ◽  
Vol 13 (4) ◽  
pp. 1800558 ◽  
Author(s):  
Xi Li ◽  
Houpeng Chen ◽  
Chenchen Xie ◽  
Daolin Cai ◽  
Sannian Song ◽  
...  

2007 ◽  
Vol 997 ◽  
Author(s):  
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Nozomu Matsuzaki ◽  
Kenzo Kurotsuchi ◽  
T Morikawa ◽  
M Kinoshita ◽  
...  

AbstractPhase-change memory is promising because it has a simple structure and has scalability that originates from its unique operating mechanism. However, the programming current should be reduced in accordance with the scaling of cell size [1,2]. We previously reported PCM (Phase Change Memory) cells that operate under 1.5-V/100-μA writing pulses [3, 4]. This PCM had a cell structure composed of 180-nm-W (tungsten) bottom contact to an O-GST (Oxygen-doped GeSbTe) film. Its low-power characteristic is suitable for 0.13-μm generation embedded applications. In the present study, we introduced a new W/O-GST/TaO/W cell structure and found further decrease of programming current the improved stability in the fabrication process. We analyzed the mechanism by which oxygen in GST and the additional TaO layer reduce the power consumption during SET/RESET operations.


2018 ◽  
Vol 29 (6) ◽  
pp. 1806338 ◽  
Author(s):  
Do Hyun Kim ◽  
Han Eol Lee ◽  
Byoung Kuk You ◽  
Sung Beom Cho ◽  
Rohan Mishra ◽  
...  

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