2015 Symposium on VLSI Technology (VLSI Technology)
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TOTAL DOCUMENTS

101

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15

(FIVE YEARS 0)

Published By IEEE

9784863485013

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Comprehensive analysis of retention characteristics in 3-D NAND flash memory cells with tube-type poly-Si channel structure

2015 Symposium on VLSI Technology (VLSI Technology) ◽

10.1109/vlsit.2015.7223670 ◽

2015 ◽

Author(s):

Ho-Jung Kang ◽

Nagyong Choi ◽

Sung-Min Joe ◽

Ji-Hyun Seo ◽

Eunseok Choi ◽

...

Keyword(s):

Flash Memory ◽

Comprehensive Analysis ◽

Channel Structure ◽

Memory Cells ◽

Nand Flash Memory ◽

Retention Characteristics ◽

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Novel oxygen showering process (OSP) for extreme damage suppression of sub-20nm high density p-MTJ array without IBE treatment

2015 Symposium on VLSI Technology (VLSI Technology) ◽

10.1109/vlsit.2015.7223660 ◽

2015 ◽

Author(s):

J. H. Jeong ◽

T. Endoh

Keyword(s):

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Novel single p+poly-Si/Hf/SiON gate stack technology on silicon-on-thin-buried-oxide (SOTB) for ultra-low leakage applications

2015 Symposium on VLSI Technology (VLSI Technology) ◽

10.1109/vlsit.2015.7223665 ◽

2015 ◽

Author(s):

Y. Yamamoto ◽

H. Makiyama ◽

T. Yamashita ◽

H. Oda ◽

S. Kamohara ◽

...

Keyword(s):

Buried Oxide ◽

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High-mobility High-Ge-Content Si1−xGex-OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width

2015 Symposium on VLSI Technology (VLSI Technology) ◽

10.1109/vlsit.2015.7223685 ◽

2015 ◽

Author(s):

P. Hashemi ◽

T. Ando ◽

K. Balakrishnan ◽

J. Bruley ◽

S. Engelmann ◽

...

Keyword(s):

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[Title page]

2015 Symposium on VLSI Technology (VLSI Technology) ◽

10.1109/vlsit.2015.7223621 ◽

2015 ◽

Keyword(s):

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In0.53Ga0.47As MOSFETs with high channel mobility and gate stack quality fabricated on 300 mm Si substrate

2015 Symposium on VLSI Technology (VLSI Technology) ◽

10.1109/vlsit.2015.7223675 ◽

2015 ◽

Author(s):

M. L. Huang ◽

S. W. Chang ◽

M. K. Chen ◽

C. H. Fan ◽

H. T. Lin ◽

...

Keyword(s):

Si Substrate ◽

Channel Mobility

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A new integration technology platform: Integrated fan-out wafer-level-packaging for mobile applications

2015 Symposium on VLSI Technology (VLSI Technology) ◽

10.1109/vlsit.2015.7223697 ◽

2015 ◽

Author(s):

Douglas Yu

Keyword(s):

Mobile Applications ◽

Wafer Level ◽

Technology Platform ◽

Integration Technology ◽

Wafer Level Packaging

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Active-lite interposer for 2.5 & 3D integration

2015 Symposium on VLSI Technology (VLSI Technology) ◽

10.1109/vlsit.2015.7223647 ◽

2015 ◽

Author(s):

G. Hellings ◽

M. Scholz ◽

M. Detalle ◽

D. Velenis ◽

M. de Potter de ten Broeck ◽

...

Keyword(s):

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Ultra fine-pitch TSV technology for ultra-dense high-Q RF inductors

2015 Symposium on VLSI Technology (VLSI Technology) ◽

10.1109/vlsit.2015.7223700 ◽

2015 ◽

Author(s):

Wolfgang A. Vitale ◽

Montserrat Fernandez-Bolanos ◽

Armin Klumpp ◽

Josef Weber ◽

Peter Ramm ◽

...

Keyword(s):

High Q ◽

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Device design guideline for steep slope ferroelectric FET using negative capacitance in sub-0.2V operation: Operation speed, material requirement and energy efficiency

2015 Symposium on VLSI Technology (VLSI Technology) ◽

10.1109/vlsit.2015.7223678 ◽

2015 ◽

Author(s):

Masaharu Kobayashi ◽

Toshiro Hiramoto

Keyword(s):

Energy Efficiency ◽

Steep Slope ◽

Negative Capacitance ◽

Device Design ◽

Design Guideline ◽

Operation Speed ◽

Material Requirement

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