Exploring High Efficiency Hardware Accelerator for the Key Algorithm of Square Kilometer Array Telescope Data Processing

2017 ◽  
Author(s):  
Qian Wu ◽  
Yongxin Zhu ◽  
Xu Wang ◽  
Mengjun Li ◽  
Junjie Hou ◽  
...  
Keyword(s):  
Data Processing ◽  
High Efficiency ◽  
Hardware Accelerator ◽  
Square Kilometer Array

The Design of Data Security Synchronization in the Network of Satellite and Ground Security Management Instrument

2010 ◽  
Vol 439-440 ◽  
pp. 208-214 ◽  
Author(s):  
Qian Mu Li ◽  
Rui Wang ◽  
Jie Yin ◽  
Jun Hou
Keyword(s):  
Data Processing ◽  
Real Time ◽  
Network Performance ◽  
High Efficiency ◽  
Security Management ◽  
Direct Access ◽  
Data Synchronization ◽  
Buffer Size ◽  
Synchronization Mechanism ◽  
Management Instrument

Network security, data management, data synchronization Abstract. The aim of Network of Satellite and Ground Security Management Instrument (NSGMI) is to increase network availability, improve network performance and control operation costs. After analyzing the shortcomings of traditional data synchronization mechanism, this paper reconstructs data processing method to improve communication ability of NSGMI, and provides a solution to guarantee real time and reliable on the application layer. The new mechanism provides buffer areas and operation flows to satisfy the high efficiency of data processing demand and the strong real time request. It solves how to open the buffer size when a direct access changes records.

scholarly journals Basketball Action Data Processing Method Based on Mode Symmetric Algorithm

Symmetry ◽  
2019 ◽  
Vol 11 (4) ◽  
pp. 560 ◽  
Author(s):  
Fei Zhang ◽  
Yi Jiang
Keyword(s):  
Data Processing ◽  
High Efficiency ◽  
Least Squares Method ◽  
Detection Algorithm ◽  
Processing Method ◽  
Target Image ◽  
Modal Data ◽  
Motion Data ◽  
Mode Decomposition ◽  
Data Processing Method

In the course of basketball training, a large number of basketball action data are generated according to the athletes’ body movements. Due to the low precision of the basketball action data processed by the traditional method in basketball technical training, basketball action processing is not in place. The basketball motion data processing method, based on the mode symmetric algorithm was studied. The basketball motion detection algorithm based on symmetric difference and background reduction was used to remove the background influence of basketball movement and obtain the binary basketball action target image containing the data. On this basis, the pole symmetric mode decomposition (ESMD) method was used to modally decompose the binary basketball action target image containing the data, and the least squares method was used to optimize the elliptic (AGM) curve to realize the screening of basketball action modal data. Through the cleaning and integration of basketball action modal data, integration and data reduction basketball action modal data, the data was processed efficiently. The experimental results showed that the proposed method was a high precision and high efficiency basketball action data processing method.

Hardware accelerator for linguistic data processing

1992 ◽  
Author(s):  
Marian S. Stachowicz ◽  
Janos Grantner ◽  
Larry L. Kinney
Keyword(s):  
Data Processing ◽  
Hardware Accelerator ◽  
Linguistic Data

scholarly journals High-Efficiency Parallel Cryptographic Accelerator for Real-Time Guaranteeing Dynamic Data Security in Embedded Systems

Micromachines ◽  
2021 ◽  
Vol 12 (5) ◽  
pp. 560
Author(s):  
Zhun Zhang ◽  
Xiang Wang ◽  
Qiang Hao ◽  
Dongdong Xu ◽  
Jinlei Zhang ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Data Processing ◽  
Data Security ◽  
Data Exchange ◽  
High Efficiency ◽  
Main Memory ◽  
Processing Efficiency ◽  
Dynamic Data ◽  
Field Programmable ◽  
On Chip

Dynamic data security in embedded systems is raising more and more concerns in numerous safety-critical applications. In particular, the data exchanges in embedded Systems-on-Chip (SoCs) using main memory are exposing many security vulnerabilities to external attacks, which will cause confidential information leakages and program execution failures for SoCs at key points. Therefore, this paper presents a security SoC architecture with integrating a four-parallel Advanced Encryption Standard-Galois/Counter Mode (AES-GCM) cryptographic accelerator for achieving high-efficiency data processing to guarantee data exchange security between the SoC and main memory against bus monitoring, off-line analysis, and data tampering attacks. The architecture design has been implemented and verified on a Xilinx Virtex-5 Field Programmable Gate Array (FPGA) platform. Based on evaluation of the cryptographic accelerator in terms of performance overhead, security capability, processing efficiency, and resource consumption, experimental results show that the parallel cryptographic accelerator does not incur significant performance overhead on providing confidentiality and integrity protections for exchanged data; its average performance overhead reduces to as low as 2.65% on typical 8-KB I/D-Caches, and its data processing efficiency is around 3 times that of the pipelined AES-GCM construction. The reinforced SoC under the data tampering attacks and benchmark tests confirms the effectiveness against external physical attacks and satisfies a good trade-off between high-efficiency and hardware overhead.

scholarly journals Real-Time Massive Vector Field Data Processing in Edge Computing

Sensors ◽  
2019 ◽  
Vol 19 (11) ◽  
pp. 2602 ◽  
Author(s):  
Kun Zheng ◽  
Kang Zheng ◽  
Falin Fang ◽  
Hong Yao ◽  
Yunlei Yi ◽  
...  
Keyword(s):  
Vector Field ◽  
Data Processing ◽  
Real Time ◽  
Field Data ◽  
High Efficiency ◽  
High Volume ◽  
Edge Computing ◽  
Distributed Sensors ◽  
Massive Vector ◽  
Data Source

The spread of the sensors and industrial systems has fostered widespread real-time data processing applications. Massive vector field data (MVFD) are generated by vast distributed sensors and are characterized by high distribution, high velocity, and high volume. As a result, computing such kind of data on centralized cloud faces unprecedented challenges, especially on the processing delay due to the distance between the data source and the cloud. Taking advantages of data source proximity and vast distribution, edge computing is ideal for timely computing on MVFD. Therefore, we are motivated to propose an edge computing based MVFD processing framework. In particular, we notice that the high volume feature of MVFD results in high data transmission delay. To solve this problem, we invent Data Fluidization Schedule (DFS) in our framework to reduce the data block volume and the latency on Input/Output (I/O). We evaluated the efficiency of our framework in a practical application on massive wind field data processing for cyclone recognition. The high efficiency our framework was verified by the fact that it significantly outperformed classical big data processing frameworks Spark and MapReduce.

Control Method for Improving Efficiency of Digital Inkjet Printing

2013 ◽  
Vol 816-817 ◽  
pp. 467-470
Author(s):  
Qiang Han ◽  
Wei Huang
Keyword(s):  
Data Processing ◽  
Inkjet Printing ◽  
Mass Production ◽  
High Efficiency ◽  
Control Method ◽  
Processing Algorithm ◽  
Algorithm Efficiency ◽  
Data Processing Algorithm ◽  
Efficiency Control

Improving speed of digital inkjet printing is most important to put the digital inkjet printing over for industrial mass production. The factors that impact the speed of digital inkjet printing are data analyzed. A new high-efficiency control method that improving the data processing algorithm efficiency is described in this paper.

scholarly journals Improving magnetotelluric data processing methods

2016 ◽  
pp. 40-46
Author(s):  
D. V. Epishkin
Keyword(s):  
Data Processing ◽  
High Efficiency ◽  
Transfer Functions ◽  
Power Spectra ◽  
Reference Station ◽  
Magnetotelluric Data ◽  
Noise Data ◽  
Key Features ◽  
Data Processing Methods ◽  
Huber Estimator

A magnetotelluric data processing code has been developed, which demonstrates high robustness to intense electromagnetic noise occurring in measured MT data. Key features of the code are specific approach for estimating different transfer functions and capability to utilize all four channels acquired at remote reference station. The code utilizes various techniques to reduce estimate errors, including robust Huber estimator, jackknife approach, improved remote reference technique and compensating for overestimation of power spectra. The proposed code has shown high efficiency in processing of low signal-to-noise data.

scholarly journals Fast Execution of an ASIFT Hardware Accelerator by Prior Data Processing

Electronics ◽  
2019 ◽  
Vol 8 (10) ◽  
pp. 1176
Author(s):  
Joohyuk Yum ◽  
Jin-Sung Kim ◽  
Hyuk-Jae Lee
Keyword(s):  
Data Processing ◽  
Real Time ◽  
Hardware Architecture ◽  
Experimental Results ◽  
Hardware Accelerator ◽  
Affine Transform ◽  
Operation Speed ◽  
Blurred Images

This paper proposes a new ASIFT hardware architecture that processes a Video Graphics Array (VGA)-sized (640 × 480) video in real time. The previous ASIFT accelerator suffers from low utilization because affine transformed images are computed repeatedly. In order to improve hardware utilization, the proposed hardware architecture adopts two schemes to increase the utilization of a bottleneck hardware module. The first is a prior anti-aliasing scheme, and the second is a prior down-scaling scheme. In the proposed method, 1 × 1 and 0.5 × 1 blurred images are generated and they are reused for creating various affine transformed images. Thanks to the proposed schemes, the utilization drop by waiting for the affine transform is significantly decreased, and consequently, the operation speed is increased substantially. Experimental results show that the proposed ASIFT hardware accelerator processes a VGA-sized video at the speed of 28 frames/s, which is 1.36 times faster than that of previous work.

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