A High-Speed BiCMOS Fully Differential Operational Amplifier with Improved Slew Rate and Phase Margin

2012 ◽  
Author(s):  
Feiyan Mu ◽  
Can Wang ◽  
Jie Lin
Keyword(s):  
Operational Amplifier ◽  
High Speed ◽  
Phase Margin ◽  
Slew Rate ◽  
Fully Differential

A Fully Differential Operational Amplifier with Slew Rate Enhancer and Adaptive Bias for Ultra Low Power

2017 ◽  
Vol 13 (1) ◽  
pp. 67-75 ◽  
Author(s):  
P. Karuppanan ◽  
Soumya Ranjan Ghosh ◽  
Kamran Khan ◽  
Pavan Kumar Bikki
Keyword(s):  
Low Power ◽  
Operational Amplifier ◽  
Slew Rate ◽  
Ultra Low Power ◽  
Fully Differential

scholarly journals A Versatile Design of Low Power and High-Speed Operational Amplifier using Nano Scale Transistors

2020 ◽  
Vol 9 (5) ◽  
pp. 1540-1544
Keyword(s):  
Low Power ◽  
Power Supply ◽  
Power Dissipation ◽  
Operational Amplifier ◽  
High Speed ◽  
Channel Length ◽  
Phase Margin ◽  
Unity Gain ◽  
Two Stages ◽  
Output Swing

This paper illustrates the design of low power and high-speed operational Amplifier using Nanoscale Transistors. The proposed design introduces biasing block, for generating I=10uA for Channel length=180nm Technology. Adding biasing block to two-stages operational Amplifier current is constant i.e. there are no fluctuations in power supply, increase in bandwidth and power dissipation is less as compared the previous result. The design is simulated in p-spice tool and performed AC analysis. After analysis, the design achieved the parameter like Gain = 40db, Phase Margin=90º, Unity Gain Band Width=13MHz, Output Swing=0.1v to 1.7v and Power Dissipation=0.145mW.

670-nA CMOS OTA FOR AMLCD COLUMN DRIVER

2009 ◽  
Vol 18 (02) ◽  
pp. 339-350 ◽  
Author(s):  
SALVATORE PENNISI ◽  
SALVATORE DI FAZIO ◽  
TIZIANA SIGNORELLI ◽  
FRANCESCO PULVIRENTI
Keyword(s):  
Operational Amplifier ◽  
Phase Margin ◽  
Slew Rate ◽  
Mos Transistors ◽  
Gain Bandwidth ◽  
Subthreshold Region ◽  
Class Ab ◽  
Dc Gain ◽  
Current Value ◽  
Area Occupation

A transconductance operational amplifier specifically optimized for a switched-capacitor LCD column driver is presented. It exploits MOS transistors in subthreshold region and dissipates 670 nA at DC. Despite this extremely low quiescent current value, the amplifier exhibits a DC gain of about 80 dB, and a gain-bandwidth product and phase margin around 2 MHz and 70°, with a load capacitance of 500 fF. Besides, working in class AB, the solution provides a slew rate equal to 27 V/μs. With exception of the DC gain, these performances represent an improvement with respect to comparable solutions, and are obtained while halving the area occupation.

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