A Versatile Design of Low Power and High-Speed Operational Amplifier using Nano Scale Transistors
2020 ◽
Vol 9
(5)
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pp. 1540-1544
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This paper illustrates the design of low power and high-speed operational Amplifier using Nanoscale Transistors. The proposed design introduces biasing block, for generating I=10uA for Channel length=180nm Technology. Adding biasing block to two-stages operational Amplifier current is constant i.e. there are no fluctuations in power supply, increase in bandwidth and power dissipation is less as compared the previous result. The design is simulated in p-spice tool and performed AC analysis. After analysis, the design achieved the parameter like Gain = 40db, Phase Margin=90º, Unity Gain Band Width=13MHz, Output Swing=0.1v to 1.7v and Power Dissipation=0.145mW.
2002 ◽
Vol 11
(01)
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pp. 51-55
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2007 ◽
Vol 38
(1)
◽
pp. 1647-1650
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2019 ◽
Vol 8
(6S2)
◽
pp. 817-821
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2021 ◽
Vol 23
(11)
◽
pp. 172-183
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