Quasar — A new heterogeneous programming framework for image and video processing algorithms on CPU and GPU

2014 ◽  
Author(s):  
Bart Goossens ◽  
Jonas De Vylder ◽  
Wilfried Philips
Keyword(s):  
Video Processing ◽  
Programming Framework ◽  
Image And Video Processing ◽  
Processing Algorithms ◽  
Heterogeneous Programming

scholarly journals Audio, Image, Video, and Weather Datasets for Continuous Electronic Beehive Monitoring

2021 ◽  
Vol 11 (10) ◽  
pp. 4632
Author(s):  
Vladimir Kulyukin
Keyword(s):  
Video Processing ◽  
Data Science ◽  
State Of The Art ◽  
Image And Video Processing ◽  
Performance Benchmarks ◽  
Northern Utah ◽  
Stable Performance ◽  
Processing Algorithms ◽  
Forager Traffic ◽  
Point Of Reference

In 2014, we designed and implemented BeePi, a multi-sensor electronic beehive monitoring system. Since then we have been using BeePi monitors deployed at different apiaries in northern Utah to design audio, image, and video processing algorithms to analyze forager traffic in the vicinity of Langstroth beehives. Since our first publication on BeePi in 2016, we have received multiple requests from researchers and practitioners for the datasets we have used in our research. The main objective of this article is to provide a comprehensive point of reference to the datasets that we have so far curated for our research. We hope that our datasets will provide stable performance benchmarks for continuous electronic beehive monitoring, help interested parties verify our findings and correct errors, and advance the state of the art in continuous electronic beehive monitoring and related areas of AI, machine learning, and data science.

Real-Time Image and Video Processing Using High-Level Synthesis (HLS)

2017 ◽  
pp. 390-408
Author(s):  
Murad Qasaimeh ◽  
Ehab Najeh Salahat
Keyword(s):  
Video Processing ◽  
High Performance ◽  
Low Cost ◽  
Optimization Techniques ◽  
High Level Synthesis ◽  
Image And Video Processing ◽  
Digital Hardware ◽  
Processing Algorithms ◽  
Computationally Intensive ◽  
High Level

Implementing high-performance, low-cost hardware accelerators for the computationally intensive image and video processing algorithms has attracted a lot of attention in the last 20 years. Most of the recent research efforts were trying to figure out new design automation methods to fill the gap between the ability of realizing efficient accelerators in hardware and the tight performance requirements of the complex image processing algorithms. High-Level synthesis (HLS) is a new method to automate the design process by transforming high-level algorithmic description into digital hardware while satisfying the design constraints. This chapter focuses on evaluating the suitability of using HLS as a new tool to accelerate the most demanding image and video processing algorithms in hardware. It discusses the gained benefits and current limitations, the recent academic and commercial tools, the compiler's optimization techniques and four case studies.

Real-Time Image and Video Processing Using High-Level Synthesis (HLS)

2018 ◽  
pp. 1004-1022
Author(s):  
Murad Qasaimeh ◽  
Ehab Najeh Salahat
Keyword(s):  
Video Processing ◽  
High Performance ◽  
Low Cost ◽  
Optimization Techniques ◽  
High Level Synthesis ◽  
Image And Video Processing ◽  
Digital Hardware ◽  
Processing Algorithms ◽  
Computationally Intensive ◽  
High Level

Implementing high-performance, low-cost hardware accelerators for the computationally intensive image and video processing algorithms has attracted a lot of attention in the last 20 years. Most of the recent research efforts were trying to figure out new design automation methods to fill the gap between the ability of realizing efficient accelerators in hardware and the tight performance requirements of the complex image processing algorithms. High-Level synthesis (HLS) is a new method to automate the design process by transforming high-level algorithmic description into digital hardware while satisfying the design constraints. This chapter focuses on evaluating the suitability of using HLS as a new tool to accelerate the most demanding image and video processing algorithms in hardware. It discusses the gained benefits and current limitations, the recent academic and commercial tools, the compiler's optimization techniques and four case studies.

Modern Technology for Image processing and Computer vision -A Review

2018 ◽  
Vol 1 (2) ◽  
pp. 17-23
Author(s):  
Takialddin Al Smadi
Keyword(s):  
Image Processing ◽  
Computer Vision ◽  
Augmented Reality ◽  
Video Compression ◽  
Video Processing ◽  
Vision System ◽  
Citrus Fruit ◽  
Modern Technology ◽  
Image And Video Processing ◽  
Depth Video

This survey outlines the use of computer vision in Image and video processing in multidisciplinary applications; either in academia or industry, which are active in this field.The scope of this paper covers the theoretical and practical aspects in image and video processing in addition of computer vision, from essential research to evolution of application.In this paper a various subjects of image processing and computer vision will be demonstrated ,these subjects are spanned from the evolution of mobile augmented reality (MAR) applications, to augmented reality under 3D modeling and real time depth imaging, video processing algorithms will be discussed to get higher depth video compression, beside that in the field of mobile platform an automatic computer vision system for citrus fruit has been implemented ,where the Bayesian classification with Boundary Growing to detect the text in the video scene. Also the paper illustrates the usability of the handed interactive method to the portable projector based on augmented reality.   © 2018 JASET, International Scholars and Researchers Association

scholarly journals Image and video processing on mobile devices: a survey

2021 ◽  
Author(s):  
Chamin Morikawa ◽  
Michihiro Kobayashi ◽  
Masaki Satoh ◽  
Yasuhiro Kuroda ◽  
Teppei Inomata ◽  
...  
Keyword(s):  
Mobile Devices ◽  
Video Processing ◽  
Image And Video Processing

A Novel HBE-MCM-Based Multiplier Architecture for 8-Point DCT Structure

2016 ◽  
Vol 26 (04) ◽  
pp. 1750054
Author(s):  
M. Kiruba ◽  
V. Sumathy
Keyword(s):  
Video Processing ◽  
Power Dissipation ◽  
Field Programmable Gate Array ◽  
Video Codec ◽  
Floating Point ◽  
Data Path ◽  
Image And Video Processing ◽  
Field Programmable ◽  
Minimum Number ◽  
Code Language

The Discrete Cosine Transform (DCT) structure plays a significant role in the signal processing applications such as image and video processing applications. In the traditional hardware design, the 8-point DCT architecture contains more number of logical slices in it. Also, it consists of number of multipliers to update the weight. This leads to huge area consumption and power dissipation in that architecture. To mitigate the conventional drawbacks, this paper presents a novel Hierarchical-based Expression (HBE)-Multiple Constant Multiplication (MCM)-based multiplier architecture design for the 8-point DCT structure used in the video CODEC applications. The proposed work involves modified data path architecture and Floating Point Processing Element (FPPE) architecture. Our proposed design of the multipliers and DCT architecture requires minimum number of components when compared to the traditional DCT method. The HBE-MCM-based multiplier architecture includes shifters and adders. The number of Flip-Flops (FFs) and Look Up Tables (LUTs) used in the proposed architecture is reduced. The power consumption is reduced due to the reduction in the size of the components. This design is synthesized in VERILOG code language and implemented in the Field Programmable Gate Array (FPGA). The performance of the proposed architecture is evaluated by comparing it with traditional DCT architecture in terms of the Number of FFs, Number of LUTs, area, power, delay and speed.

Image and Video Processing

2020 ◽  
pp. 147-161
Author(s):  
Ashwin Pajankar ◽  
Sharvani Chandu
Keyword(s):  
Video Processing ◽  
Image And Video Processing

DSPs for image and video processing

2000 ◽  
Vol 80 (11) ◽  
pp. 2323-2336 ◽  
Author(s):  
Klaus Illgner
Keyword(s):  
Video Processing ◽  
Image And Video Processing

Creation of codes based on wavelet transformation and its application in ADV612 chips

2017 ◽  
Vol 15 (02) ◽  
pp. 1750014 ◽  
Author(s):  
Alla Levina ◽  
Sergey Taranov
Keyword(s):  
Wavelet Transform ◽  
Video Processing ◽  
Wavelet Decomposition ◽  
Filter Bank ◽  
Mathematical Concepts ◽  
Coding Scheme ◽  
Image And Video Processing ◽  
Error Coding ◽  
New Construction ◽  
Robust Codes

Theory of wavelet transform is a powerful tool for image and video processing. Mathematical concepts of wavelet transform and filter bank have been studied carefully in many works. This work presents application of new construction of linear and robust codes based on wavelet decomposition and its application in ADV612 chips. We present the model of the error-coding scheme that allows to detect errors in the ADV612 chips with high probability. In our work, we will show that developed and presented scheme of protection drastically improves the resistance of ADV612 chips to malfunctions and errors.

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