Variability of low frequency noise in moderately-sized MOSFETs — A model for the area- and gate voltage-dependence

In this paper the origin of low-frequency noise in the Asymmetric Self-Cascode (A-SC) structure composed by Fully Depleted SOI nMOSFETs is investigated through experimental results. It is shown that the predominant noise source of the A-SC structure is linked to carrier number fluctuations, being governed by the noise generated in the transistor near the source. Larger channel doping concentrations degrade the quality of the Si-SiO2 interface and the gate oxide, which causes an increase of the normalized drain current noise spectral density, just as the reduction of the gate voltage overdrive, since there are few carriers in the channel. The A-SC structures have showed higher noise compared with single transistors. In saturation regime, the increase of the gate voltage overdrive has incremented the corner frequency, shifting the g-r noise to higher frequencies. Besides that, the normalized noise has been significantly increased when compared with the linear regime due to the rise of the drain current noise spectral density.

Download Full-text

High gate voltage drain current leveling off and its low-frequency noise in 65nm fully-depleted strained and non-strained SOI nMOSFETs

Solid-State Electronics ◽

10.1016/j.sse.2007.12.011 ◽

2008 ◽

Vol 52 (5) ◽

pp. 801-807 ◽

Cited By ~ 5

Author(s):

N. Lukyanchikova ◽

N. Garbar ◽

V. Kudina ◽

A. Smolanka ◽

M. Lokshin ◽

...

Keyword(s):

Gate Voltage ◽

Low Frequency ◽

Drain Current ◽

Frequency Noise ◽

Low Frequency Noise ◽

Fully Depleted

Download Full-text

Influence of an accumulation back-gate voltage on the low-frequency noise spectra of 0.13 μm fully-depleted SOI MOSFETs fabricated on ELTRAN and UNIBOND wafers

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat No 04EX850) ESSDER-04 ◽

10.1109/essder.2004.1356563 ◽

2004 ◽

Author(s):

N. Litkyanchikova ◽

N. Garbar ◽

A. Smolanka ◽

E. Simoen ◽

C. Claeys

Keyword(s):

Gate Voltage ◽

Low Frequency ◽

Frequency Noise ◽

Low Frequency Noise ◽

Back Gate ◽

Fully Depleted ◽

Noise Spectra

Download Full-text

LOW FREQUENCY NOISE AND INTERFACE DENSITY OF TRAPS IN InGaAs MOSFETs WITH GdScO3 HIGH-K DIELECTRIC

International Journal of High Speed Electronics and Systems ◽

10.1142/s0129156411006441 ◽

2011 ◽

Vol 20 (01) ◽

pp. 105-113

Author(s):

S. RUMYANTSEV ◽

W. STILLMAN ◽

M. SHUR ◽

T. HEEG ◽

D.G. SCHLOM ◽

...

Keyword(s):

Gate Voltage ◽

Field Effect ◽

Field Effect Transistors ◽

Low Frequency ◽

Trap Density ◽

Frequency Noise ◽

Low Frequency Noise ◽

Enhancement Mode ◽

High K ◽

High K Dielectric

Insulated gate n-channel enhancement mode InGaAs field effect transistors with the GdScO 3 high-k dielectric have been fabricated and studied. The low frequency noise was high indicating a high interface density of traps. Trap density and its dependence on the gate voltage have been extracted from the noise and conductance measurements.

Download Full-text

4H-SiC MOSFETs with Si-Like Low-Frequency Noise Characteristics

Materials Science Forum ◽

10.4028/www.scientific.net/msf.717-720.1105 ◽

2012 ◽

Vol 717-720 ◽

pp. 1105-1108

Author(s):

Sergey L. Rumyantsev ◽

Michael S. Shur ◽

Michael E. Levinshtein ◽

Pavel A. Ivanov ◽

John W. Palmour ◽

...

Keyword(s):

Fermi Level ◽

Gate Voltage ◽

Low Frequency ◽

Frequency Noise ◽

Low Frequency Noise ◽

Noise Characteristics ◽

Oxide Traps ◽

Ion Implanted

4H-SiC MOSFETs with an epitaxial channel and NO postoxidation annealing have Si-like dependencies of noise on gate voltage. Such dependencies indicate that the density of the negatively charged oxide traps responsible for 1/f noise, Ntv, does not depend on the position of the Fermi level. The Ntv was found to be ~ 2×1019 cm-3eV-1. This value is considerably smaller than previously measured for transistors with ion implanted channels.

Download Full-text