Modular Multilevel Converter topologies with DC-Short circuit current limitation

Author(s):  
Rainer Marquardt
Electronics ◽  
2018 ◽  
Vol 7 (8) ◽  
pp. 134 ◽  
Author(s):  
Muhammad Ali ◽  
Muhammad Khan ◽  
Jianming Xu ◽  
Muhammad Faiz ◽  
Yaqoob Ali ◽  
...  

This paper presents a comparative analysis of a new topology based on an asymmetric hybrid modular multilevel converter (AHMMC) with recently proposed multilevel converter topologies. The analysis is based on various parameters for medium voltage-high power electric traction system. Among recently proposed topologies, few converters have been analysed through simulation results. In addition, the study investigates AHMMC converter which is a cascade arrangement of H-bridge with five-level cascaded converter module (FCCM) in more detail. The key features of the proposed AHMMC includes: reduced switch losses by minimizing the switching frequency as well as the components count, and improved power factor with minimum harmonic distortion. Extensive simulation results and low voltage laboratory prototype validates the working principle of the proposed converter topology. Furthermore, the paper concludes with the comparison factors evaluation of the discussed converter topologies for medium voltage traction applications.


2016 ◽  
Vol 31 (2) ◽  
pp. 1278-1288 ◽  
Author(s):  
Zhifang Yang ◽  
Haiwang Zhong ◽  
Qing Xia ◽  
Chongqing Kang

2012 ◽  
Vol 260-261 ◽  
pp. 525-531 ◽  
Author(s):  
Salman Badkubi

This paper presents the comprehensive implementation of Distributed Static Series Compensator (DSSC) to limit the fault currents in power systems. This is the first time that the limitation of fault currents with D-FACTS devices is addressed. DSSC is one of the D-FACTS families whichoperate in a similar manner as Static Synchronous Series Compensator (SSSC) but in smaller size, lower price and more capability. The effectiveness of the DSSC in fault current limitation is investigated through the series voltage effect upon the line. The short circuit current limitation strategy presented here exhibited that besides of the power flow control which is carried out by DSSC; it can also perform this additional function. In the following the potency of the DSSC in reduction of instantaneous voltage dip range during fault current limiting mode is clarified. Furthermore, it is disclosed that with performing more DSSC in the power system, the entire system voltage dip will be improved. In order to validate the claims, computer simulations using PSCAD/EMTDC are exploited.


2013 ◽  
Vol 732-733 ◽  
pp. 782-788
Author(s):  
Jing Hao Chen ◽  
Wen Ying Liu ◽  
Wei Zheng ◽  
Chen Liang

A model for optimally evaluating grid short-circuit current limitation measures is proposed. Based on the fuzzy comprehensive evaluation model, a comprehensive evaluation system is introduced to consider the limiting effect and economy of the limiting measures configure program, also the program's impact on system security is involved. A judgment matrix is constructed to determine the weights of different system layers. With fuzzy behavior indices and membership function being led into, the evaluation of configuration program is given. Taking Gansu power grid for example, the feasibility and practicality of the proposed model are verified by simulation results.


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