With the advent of VLSI technology, circuits with more than one million transistors have been integrated onto a single chip. As the complexity of ICs grows, the time and money spent on designing the circuits become more important. A large, often dominant, part of the cost and time required to design an IC is consumed in the routing operation. The routing of carriers, such as in IC chips and printed circuit boards, is a classical problem in Computer Aided Design. With the complexity inherent in VLSI circuits, high performance routers are necessary. In this paper, a crucial step in the channel routing technique, the single row routing (SRR) problem, is considered. First, we discuss the relevance of SRR in the context of the general routing problem. Secondly, we show that heuristic algorithms are far from solving the general problem. Next, we introduce evolutionary computation, and, in particular, genetic algorithms (GAs) as a justifiable method in solving the SRR problem. Finally, an efficient O (nk) complexity technique based on GAs heuristic is obtained to solve the general SRR problem containing n nodes. Experimental results show that the algorithm is faster and can often generate better results than many of the leading heuristics proposed in the literature.
HIGH PERFORMANCE SR LATCH IN VLSI CIRCUITS USING FINFET 18NM TECHNOLOGY