scholarly journals Scalability of split-gate charge trap memories down to 20nm for low-power embedded memories

2011 ◽  
Author(s):  
L. Masoero ◽  
G. Molas ◽  
F. Brun ◽  
M. Gely ◽  
J. P. Colonna ◽  
...  
Keyword(s):  
Low Power ◽  
Charge Trap ◽  
Embedded Memories ◽  
Gate Charge

scholarly journals A read-decoupled gated-ground SRAM architecture for low-power embedded memories

Integration ◽  
2012 ◽  
Vol 45 (3) ◽  
pp. 229-236 ◽  
Author(s):  
Wasim Hussain ◽  
Shah M. Jahinuzzaman
Keyword(s):  
Low Power ◽  
Embedded Memories

Self-Amplified Dual Gate Charge Trap Flash Memory for Low-Voltage Operation

2013 ◽  
Vol 34 (6) ◽  
pp. 756-758 ◽  
Author(s):  
Ki-Hyun Jang ◽  
Hyun-June Jang ◽  
Jin-Kwon Park ◽  
Won-Ju Cho
Keyword(s):  
Flash Memory ◽  
Low Voltage ◽  
Charge Trap ◽  
Low Voltage Operation ◽  
Dual Gate ◽  
Gate Charge

scholarly journals Design and Analysis of Low Power Image Filters Toward Defect-Resilient Embedded Memories for Multimedia SoCs

2006 ◽  
pp. 295-308 ◽  
Author(s):  
Kang Yi ◽  
Kyeong Hoon Jung ◽  
Shih-Yang Cheng ◽  
Young-Hwan Park ◽  
Fadi Kurdahi ◽  
...  
Keyword(s):  
Low Power ◽  
Image Filters ◽  
Embedded Memories
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