Diamond Semiconductor Devices, state-of-the-art of material growth and device processing

2020 ◽  
Author(s):  
H. Umezawa
Keyword(s):  
State Of The Art ◽  
Semiconductor Devices ◽  
Material Growth ◽  
Device Processing

(Invited) High Power Semiconductor Devices for FACTS: Current State of the Art and Opportunities for Advanced Materials

2019 ◽  
Vol 41 (8) ◽  
pp. 19-30 ◽  
Author(s):  
Matthew J. Marinella ◽  
Stanley Atcitty ◽  
Sandeepan DasGupta ◽  
Robert J. Kaplar ◽  
Mark A. Smith
Keyword(s):  
High Power ◽  
State Of The Art ◽  
Semiconductor Devices ◽  
Advanced Materials ◽  
Power Semiconductor ◽  
Power Semiconductor Devices ◽  
Current State

scholarly journals Advances in Elemental Electron Tomography for the State-of-the-art Semiconductor Devices and Circuits Characterization and Failure Analysis

2017 ◽  
Vol 23 (S1) ◽  
pp. 1456-1457 ◽  
Author(s):  
B. Fu ◽  
M Gribelyuk ◽  
Frieder H. Baumann ◽  
C. Fang ◽  
Wayne Zhao ◽  
...  
Keyword(s):  
Failure Analysis ◽  
State Of The Art ◽  
Electron Tomography ◽  
Semiconductor Devices ◽  
The State

SPICE MODELING OF COMPOUND SEMICONDUCTOR DEVICES

1998 ◽  
Vol 09 (03) ◽  
pp. 725-781 ◽  
Author(s):  
BENJAMIN IÑIGUEZ ◽  
TOR A. FJELDLY ◽  
MICHAEL S. SHUR ◽  
TROND YTTERDAL
Keyword(s):  
Computer Aided Design ◽  
Resonant Tunneling ◽  
State Of The Art ◽  
Semiconductor Devices ◽  
Wide Bandgap ◽  
Design Tool ◽  
Tunneling Devices ◽  
Aided Design ◽  
Resonant Tunneling Devices ◽  
Advanced Computer

We review recent advances in the modeling of novel and advanced semiconductor devices, including state-of-the-art MESFET and HFETs, heterodimensional FETs, resonant tunneling devices, and wide-bandgap semiconductor transistors. We emphasize analytical, physics-based modeling incorporating the important effects present in modern day devices, including deep sub-micrometer devices. Such an approach is needed in order to accurately describe and predict both stationary and dynamic device behavior and to make the models suitable for implementation in advanced computer aided design tool including circuit simulators such as SPICE.

TLS-Dicing for SiC - Latest Assessment Results

2018 ◽  
Vol 924 ◽  
pp. 547-551
Author(s):  
Dirk Lewke ◽  
Mercedes Cerezuela Barreto ◽  
Karl Otto Dohnke ◽  
Hans Ulrich Zühlke ◽  
Christian Belgardt ◽  
...  
Keyword(s):  
State Of The Art ◽  
Semiconductor Devices ◽  
The State ◽  
Electrical Performance ◽  
European Project ◽  
Edge Quality ◽  
Volume Production ◽  
Laser Separation ◽  
Assessment Results

With the gaining demand for SiC semiconductor devices it is more and more challenging to meet the requirements for SiC volume production with the state of the art wafer dicing technology. In order to overcome this challenge the laser based dicing technology Thermal Laser Separation (TLS-DicingTM) was assessed for SiC volume production within the European project SEA4KET. This paper presents the key results of this project. It could be demonstrated that the demand of SiC volume production regarding throughput and cost as well as edge quality and electrical performance of diced chips can be met with TLS-DicingTM.

Sign in / Sign up

Export Citation Format

Share Document