Design and Analysis of a Practical RMS Power Detector Using Power MOSFET

2021 ◽  
Author(s):  
Jules Guiliary Ravanne ◽  
Yi Lung Then ◽  
Hieng Tiong Su ◽  
Ismat Hijazin
Keyword(s):  
Power Mosfet ◽  
Power Detector

Carrier Redistribution Analysis of Gate-Biased SiC Power-MOSFET Using Super-Higher-Order Scanning Nonlinear Dielectric Microscopy

2015 ◽  
Author(s):  
Norimichi Chinone ◽  
Yasuo Cho
Keyword(s):  
Cross Section ◽  
Measurement System ◽  
Higher Order ◽  
Depletion Layer ◽  
Gate Bias ◽  
Power Mosfet ◽  
Nonlinear Dielectric ◽  
Voltage Dependent ◽  
Carrier Redistribution ◽  
Source Voltage

Abstract Gate-bias dependent depletion layer distribution and carrier distributions in cross-section of SiC power MOSFET were measured by newly developed measurement system based on super-higher-order scanning nonlinear dielectric microscope. The results visualized gate-source voltage dependent redistribution of depletion layer and carrier.

2D carrier Density Mapping Using SNDM-dC/dV and dC/dz of SiC Power MOSFET

2019 ◽  
Author(s):  
Jing-jiang Yu ◽  
T. Yamaoka ◽  
T. Aiso ◽  
K. Watanabe ◽  
Y. Shikakura ◽  
...  
Keyword(s):  
Carrier Density ◽  
Environmental Control ◽  
Boundary Region ◽  
Power Mosfet ◽  
Dopant Profiling ◽  
Density Mapping ◽  
Resolution Observation ◽  
Develop Software ◽  
20 Nm ◽  
High Resolution Observation

Abstract Scanning nonlinear dielectric microscopy is continuously developed as an AFM-derived method for 2D dopant profiling of semiconductor devices. In this paper, the authors apply 2D carrier density mapping to Si and SiC and succeed a high resolution observation of the SiC planar power MOSFET. Furthermore, they develop software that combines dC/dV and dC/dz images and expresses both density and polarity in a single distribution image. The discussion provides the details of AFM experiments that were conducted using a Hitachi environmental control AFM5300E system. The results indicated that the carrier density decreases in the boundary region between n plus source and p body. The authors conclude that although the resolutions of dC/dV and dC/dz are estimated to be 20 nm or less and 30 nm or less, respectively, there is a possibility that the resolution can be further improved by using a sharpened probe.

3D Integrated Power—A Discrete Perspective

2015 ◽  
Author(s):  
Ian Kearney ◽  
Stephen Brink
Keyword(s):  
Heat Dissipation ◽  
Automatic Test Equipment ◽  
Systematic Analysis ◽  
Power Mosfet ◽  
Root Cause ◽  
Industry Standard ◽  
Bona Fide ◽  
Process Issue ◽  
Board Level ◽  
3D Package

Abstract The shift in power conversion and power management applications to thick copper clip technologies and thinner silicon dies enable high-current connections (overcoming limitations of common wire bond) and enhance the heat dissipation properties of System-in-Package solutions. Powerstage innovation integrates enhanced gate drivers with two MOSFETs combining vertical current flow with a lateral power MOSFET. It provides a low on-resistance and requires an extremely low gate charge with industry-standard package outlines - a combination not previously possible with existing silicon platforms. These advancements in both silicon and 3D Multi-Chip- Module packaging complexity present multifaceted challenges to the failure analyst. The various height levels and assembly interfaces can be difficult to deprocess while maintaining all the critical evidence. Further complicating failure isolation within the system is the integration of multiple chips, which can lead to false positives. Most importantly, the discrete MOSFET all too often gets overlooked as just a simple threeterminal device leading to incorrect deductions in determining true root cause. This paper presents the discrete power MOSFET perspective amidst the competing forces of the system-to-board-level failure analysis. It underlines the requirement for diligent analysis at every step and the importance as an analyst to contest the conflicting assumptions of challenging customers. Automatic Test Equipment (ATE) data-logs reported elevated power MOSFET leakage. Initial assumptions believed a MOSFET silicon process issue existed. Through methodical anamnesis and systematic analysis, the true failure was correctly isolated and the power MOSFET vindicated. The authors emphasize the importance of investigating all available evidence, from a macro to micro 3D package perspective, to achieve the bona fide path forward and true root cause.

scholarly journals Smart sensing metasurface with self-defined functions in dual polarizations

Nanophotonics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 3271-3278 ◽  
Author(s):  
Qian Ma ◽  
Qiao Ru Hong ◽  
Xin Xin Gao ◽  
Hong Bo Jing ◽  
Che Liu ◽  
...  
Keyword(s):  
Field Programmable Gate Array ◽  
The Other ◽  
Rf Power ◽  
Pin Diodes ◽  
Self Recognition ◽  
Field Programmable ◽  
Power Detector ◽  
Smart Sensing ◽  
High Level ◽  
Rf Power Detector

AbstractFor the intelligence of metamaterials, the -sensing mechanism and programmable reaction units are two important components for self-recognition and -determination. However, their realization still face great challenges. Here, we propose a smart sensing metasurface to achieve self-defined functions in the framework of digital coding metamaterials. A sensing unit that can simultaneously process the sensing channel and realize phase-programmable capability is designed by integrating radio frequency (RF) power detector and PIN diodes. Four sensing units distributed on the metasurface aperture can detect the microwave incidences in the x- and y-polarizations, while the other elements can modulate the reflected phase patterns under the control of a field programmable gate array (FPGA). To validate the performance, three schemes containing six coding patterns are presented and simulated, after which two of them are measured, showing good agreements with designs. We envision that this work may motivate studies on smart metamaterials with high-level recognition and manipulation.

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