A new physical model and experimental measurements of copper interconnect resistivity considering size effects and line-edge roughness (LER)

2009 ◽  
Author(s):  
Gerald Lopez ◽  
Jeffrey Davis ◽  
James Meindl
Keyword(s):  
Physical Model ◽  
Size Effects ◽  
Experimental Measurements ◽  
Line Edge Roughness ◽  
Copper Interconnect ◽  
Edge Roughness

Characterization of Line-Edge Roughness in Cu/Low-kInterconnect Pattern

2008 ◽  
Vol 47 (4) ◽  
pp. 2501-2505 ◽  
Author(s):  
Atsuko Yamaguchi ◽  
Daisuke Ryuzaki ◽  
Ken-ichi Takeda ◽  
Jiro Yamamoto ◽  
Hiroki Kawada ◽  
...  
Keyword(s):  
Line Edge Roughness ◽  
Edge Roughness

Direct Evaluation of Gate Line Edge Roughness Impact on Extension Profiles in Sub-50-nm n-MOSFETs

2006 ◽  
Vol 53 (11) ◽  
pp. 2755-2763 ◽  
Author(s):  
H. Fukutome ◽  
Y. Momiyama ◽  
T. Kubo ◽  
Y. Tagawa ◽  
T. Aoyama ◽  
...  
Keyword(s):  
Line Edge Roughness ◽  
Direct Evaluation ◽  
Edge Roughness

A multi-resolution approach for line-edge roughness detection

2009 ◽  
Vol 86 (3) ◽  
pp. 340-351 ◽  
Author(s):  
Wei Sun ◽  
Rajib Mukherjee ◽  
Pieter Stroeve ◽  
Ahmet Palazoglu ◽  
Jose A. Romagnoli
Keyword(s):  
Line Edge Roughness ◽  
Edge Roughness

Line edge roughness induced threshold voltage variability in nano-scale FinFETs

2017 ◽  
Vol 103 ◽  
pp. 304-313 ◽  
Author(s):  
Rituraj Singh Rathore ◽  
Rajneesh Sharma ◽  
Ashwani K. Rana
Keyword(s):  
Threshold Voltage ◽  
Line Edge Roughness ◽  
Nano Scale ◽  
Edge Roughness
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