Energy Efficient and Process Tolerant Full Adder Design in Near Threshold Region Using FinFET

2010 ◽  
Author(s):  
A Islam ◽  
M W Akram ◽  
A Imran ◽  
M Hasan
Keyword(s):  
Energy Efficient ◽  
Full Adder ◽  
Threshold Region ◽  
Near Threshold

Exploring Approximate Computing and Near- Threshold Operation to Design Energy -efficient Multipliers

2021 ◽  
Author(s):  
Vinicius Zanandrea ◽  
Douglas M. Borges ◽  
Vagner S. Rosa ◽  
Cristina Meinhardt
Keyword(s):  
Energy Efficient ◽  
Approximate Computing ◽  
Near Threshold

Relaxation effects in C1s photoionisation of CO: a high resolution photoelectron study in the near-threshold region

1995 ◽  
Vol 75 ◽  
pp. 97-108 ◽  
Author(s):  
H.M. Köppe ◽  
A.L.D. Kilcoyne ◽  
J. Feldhaus ◽  
A.M. Bradshaw
Keyword(s):  
High Resolution ◽  
Threshold Region ◽  
Relaxation Effects ◽  
Photoelectron Study ◽  
Near Threshold

Energy efficient low‐power full‐adder by 65 nm CMOS technology in ALU

2018 ◽  
Vol 31 (12) ◽  
Author(s):  
Suresh Kumar N ◽  
Paramasivam K
Keyword(s):  
Low Power ◽  
Energy Efficient ◽  
Full Adder ◽  
Cmos Technology

scholarly journals Spin Wave Based Full Adder

2021 ◽  
Author(s):  
Abdulqader Mahmoud ◽  
Frederic Vanderveken ◽  
Florin Ciubotaru ◽  
Christoph Adelmann ◽  
Sorin Cotofana ◽  
...  
Keyword(s):  
Energy Efficient ◽  
Wall Motion ◽  
State Of The Art ◽  
Magnetic Tunnel Junction ◽  
Domain Wall Motion ◽  
Full Adder ◽  
Low Energy ◽  
Phase Detection ◽  
Micromagnetic Simulations ◽  
The Road

Spin Waves (SWs) propagate through magnetic waveguides and interfere with each other without consuming noticeable energy, which opens the road to new ultra-low energy circuit designs. In this paper we build upon SW features and propose a novel energy efficient Full Adder (FA) design consisting of The FA 1 Majority and 2 XOR gates, which outputs Sum and Carry-out are generated by means of threshold and phase detection, respectively. We validate our proposal by means of MuMax3 micromagnetic simulations and we evaluate and compare its performance with state-of-the-art SW, 22nm CMOS, Magnetic Tunnel Junction (MTJ), Spin Hall Effect (SHE), Domain Wall Motion (DWM), and Spin-CMOS implementations. Our evaluation indicates that the proposed SW FA consumes 22.5% and 43% less energy than the direct SW gate based and 22nm CMOS counterparts, respectively. Moreover it exhibits a more than 3 orders of magnitude smaller energy consumption when compared with state-of-the-art MTJ, SHE, DWM, and Spin-CMOS based FAs, and outperforms its contenders in terms of area by requiring at least 22% less chip real-estate.

scholarly journals Spin Wave Based Approximate Computing

2021 ◽  
Author(s):  
Abdulqader Mahmoud ◽  
Frederic Vanderveken ◽  
Florin Ciubotaru ◽  
Christoph Adelmann ◽  
Said Hamdioui ◽  
...  
Keyword(s):  
Real Estate ◽  
Error Rate ◽  
Energy Efficient ◽  
State Of The Art ◽  
Magnetic Tunnel Junction ◽  
Domain Wall Motion ◽  
Full Adder ◽  
Average Error ◽  
Approximate Computing ◽  
Average Error Rate

By their very nature Spin Waves (SWs) enable the realization of energy efficient circuits as they propagate and interfere within waveguides without consuming noticeable energy. However, SW computing can be even more energy efficient by taking advantage of the approximate computing paradigm as many applications are error-tolerant like multimedia and social media. In this paper we propose an ultra-low energy novel Approximate Full Adder (AFA) and a 2-bit inputs Multiplier (AMUL). The approximate FA consists of one Majority gate while the approximate MUL is built by means of 3 AND gates. We validate the correct functionality of our proposal by means of micromagnetic simulations and evaluate the approximate FA figure of merit against state-of-the-art accurate SW, 7nm CMOS, Spin Hall Effect (SHE), Domain Wall Motion (DWM), accurate and approximate 45nm CMOS, Magnetic Tunnel Junction (MTJ), and Spin-CMOS FA implementations. Our results indicate that AFA consumes 43% and 33% less energy than state-of-the-art accurate SW and 7nm CMOS FA, respectively, and saves 69% and 44% when compared with accurate and approximate 45nm CMOS, respectively, and provides a 2 orders of magnitude energy reduction when compared with accurate SHE, accurate and approximate DWM, MTJ, and Spin-CMOS, counterparts. In addition, it achieves the same error rate as approximate 45nm CMOS and Spin-CMOS FA whereas it exhibits 50% less error rate than the approximate DWM FA. Furthermore, it outperforms its contenders in terms of area by saving at least 29% chip real-estate. AMUL is evaluated and compared with state-of-the-art accurate SW and 16nm CMOS accurate and approximate state-of-the-art designs. The evaluation results indicate that it saves at least 2x and 5x energy in comparison with the state-of-the-art SW designs and 16nm CMOS accurate and approximate designs, respectively, and has an average error rate of 10%, while the approximate CMOS MUL has an average error rate of 12.5%, and requires at least 64% less chip real-estate.

scholarly journals A Naval Energy Efficient Synthesis of Full Adder

2016 ◽  
Vol 01 (01) ◽  
pp. 28-31
Author(s):  
Deepika, Ankur Gupta
Keyword(s):  
Energy Efficient ◽  
Full Adder ◽  
Efficient Synthesis

scholarly journals Three-body analysis of incoherent η-photoproduction on the deuteron in the near threshold region

2000 ◽  
Vol 492 (1-2) ◽  
pp. 32-38 ◽  
Author(s):  
A. Fix ◽  
H. Arenhövel
Keyword(s):  
Threshold Region ◽  
Three Body ◽  
Near Threshold
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