A Gate-Controllable High-Voltage SCR Device with High Performance in ESD Protection and Latch-up Immunity

Author(s):  
Tuo-Hsin Chien ◽  
Klaus Y.-J. Hsu
2013 ◽  
Vol 732-733 ◽  
pp. 1207-1211
Author(s):  
Shen Li Chen ◽  
Tzung Shian Wu

In this paper, we propose a novel high-voltage (HV) nLDMOS transistor with a small Ron resistance, low trigger voltage (Vt1) and high holding voltage (Vh) characteristics. Here, we introduce a deep N+-buried-layer (NBL) into this HV nLDMOS to evaluate the ESD/latch-up (LU) parameters variation. These electric snapback parameters affect the reliability of proposed device and its performance. Eventually, we expect this proposed HV stucture processed better characteristic behaviors, which can be applied to the power electronics and ESD protection application of HV ICs.


Author(s):  
Mark H. Ellisman

The increased availability of High Performance Computing and Communications (HPCC) offers scientists and students the potential for effective remote interactive use of centralized, specialized, and expensive instrumentation and computers. Examples of instruments capable of remote operation that may be usefully controlled from a distance are increasing. Some in current use include telescopes, networks of remote geophysical sensing devices and more recently, the intermediate high voltage electron microscope developed at the San Diego Microscopy and Imaging Resource (SDMIR) in La Jolla. In this presentation the imaging capabilities of a specially designed JEOL 4000EX IVEM will be described. This instrument was developed mainly to facilitate the extraction of 3-dimensional information from thick sections. In addition, progress will be described on a project now underway to develop a more advanced version of the Telemicroscopy software we previously demonstrated as a tool to for providing remote access to this IVEM (Mercurio et al., 1992; Fan et al., 1992).


2021 ◽  
pp. 2002125
Author(s):  
Jokin Rikarte ◽  
Iñaki Madinabeitia ◽  
Giorgio Baraldi ◽  
Francisco José Fernández‐Carretero ◽  
Víctor Bellido‐González ◽  
...  

RSC Advances ◽  
2017 ◽  
Vol 7 (32) ◽  
pp. 20049-20056 ◽  
Author(s):  
Young-Kyu Han ◽  
Jaeik Yoo ◽  
Taeeun Yim

We presented a computational screening protocol for the efficient development of cathode-electrolyte interphase (CEI)-forming additive materialsviathe first-principles calculations.


2018 ◽  
Vol 201 ◽  
pp. 02004
Author(s):  
Shao-Ming Yang ◽  
Gene Sheu ◽  
Tzu Chieh Lee ◽  
Ting Yao Chien ◽  
Chieh Chih Wu ◽  
...  

High performance power device is necessary for BCD power device. In this paper, we used 3D Synopsis TCAD simulation tool Sentaurus to develop 120V device and successfully simulated. We implemented in a conventional 0.35um BCDMOS process to present of a novel high side 120V LDMOS have reduced surface field (RESURF) and Liner p-top structure with side isolation technology. The device has been research to achieve a benchmark specific on-resistance of 189 mΩ-mm2 while maintaining horizontal breakdown voltage and vertical isolation voltage both to target breakdown voltage of 120V. In ESOA, we also proposed a better performance of both device without kirk effect.


Author(s):  
Y.S. Choi ◽  
J.J. Kim ◽  
C.K. Jeon ◽  
M.H. Kim ◽  
S.L. Kim ◽  
...  
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