Optimizing the trade-off between the RDS(on) of power MOSFETs and linear mode perfomance by local modification of MOSFET gain

2016 ◽  
Author(s):  
Mo-Huai Chang ◽  
Phil Rutter
Keyword(s):  
Trade Off ◽  
Power Mosfets ◽  
Linear Mode ◽  
Local Modification

Holism Resurfacing: How Far Should We Go With It?

Metaphysica ◽  
2021 ◽  
Vol 0 (0) ◽  
Author(s):  
Márta Ujvári
Keyword(s):  
Trade Off ◽  
Linear Mode ◽  
Holistic Perspective ◽  
Non Linear

Abstract The recent holistic trends in metaphysics are surveyed here and a tentative typology is offered. The non-linear mode of composition is suggested as the key feature of holism, apart from its familiar non-reductionism and emergentism. It is argued that those holistic views are promising that refrain from extreme relationalism based on the denial of there being self-subsistence particulars; also, those refraining from the postulation of an unarticulated all-embracing whole where both relations and terms are denied to be genuine ontological items. The further suggestion is that a trade-off between the holistic perspective and the limits imposed upon it in the form of built-in confinements may help in making this metaphysics go.

scholarly journals Nanoscale Insights on the Origin of the Power MOSFETs Breakdown after Extremely Long High Temperature Reverse Bias Stress

2020 ◽  
Vol 1004 ◽  
pp. 433-438
Author(s):  
Patrick Fiorenza ◽  
Mario Alessandrino ◽  
Beatrice Carbone ◽  
Clarice Di Martino ◽  
Alfio Russo ◽  
...  
Keyword(s):  
High Temperature ◽  
Scanning Probe Microscopy ◽  
Reverse Bias ◽  
Dielectric Breakdown ◽  
Threading Dislocation ◽  
Power Mosfets ◽  
Bias Stress ◽  
Local Modification ◽  
Minority Carriers

In this work, the origin of the dielectric breakdown of 4H-SiC power MOSFETs was studied at the nanoscale, analyzing devices that failed after extremely long (three months) of high temperature reverse bias (HTRB) stress. A one-to-one correspondence between the location of the breakdown event and a threading dislocation propagating through the epitaxial layer was found. Scanning probe microscopy (SPM) revealed the conductive nature of the threading dislocation and a local modification of the minority carriers concentration. Basing on these results, the role of the threading dislocation on the failure of 4H-SiC MOSFETs could be clarified.

scholarly journals Understanding Linear-Mode Robustness in Low-Voltage Trench Power MOSFETs

2010 ◽  
Vol 10 (1) ◽  
pp. 123-129 ◽  
Author(s):  
O.M. Alatise ◽  
I. Kennedy ◽  
G. Petkos ◽  
K. Khan ◽  
A. Koh ◽  
...  
Keyword(s):  
Low Voltage ◽  
Power Mosfets ◽  
Linear Mode

Advanced Thermal Simulation Model for Power MOSFETs

2013 ◽  
Vol 2013 (1) ◽  
pp. 000598-000603 ◽  
Author(s):  
Jens Ejury
Keyword(s):  
Temperature Rise ◽  
High Efficiency ◽  
High Cell Density ◽  
Local Heating ◽  
Junction Temperature ◽  
Thermal Limit ◽  
Power Mosfets ◽  
Linear Mode ◽  
Dynamic Representation ◽  
Mode Operation

Modern Power MOSFETs are widely used for high efficiency SMPS applications. Also, they provide very low on-resistance which reduces conduction losses in Oring or eFuse applications. These applications as well as others have transition states in which they drive the MOSFET in linear mode operation during turn-on and turn-off events respectively. The high cell density in modern Power MOSFETs provokes uneven current distribution in linear mode operation which locally stresses certain cell areas more than others. To prevent destruction, the SOA of these MOSFETs has a thermal limit line boundary imposed. With existing L3 MOSFET models it is possible to simulate temperature rise and power loss of the entire MOSFET. However, the local heating effect is not represented in this model. Here, a wrapper is being introduced. It converts a standard L3-model into a model that incorporates a dynamic representation of the entire SOA diagram. The temperature rise follows the hottest cell so that simulations in linear mode become a valid way to predict the highest junction temperature. The limitations of this approach will be outlined.

A Flow-Preserving Algorithm for the Time-Cost Trade-Off Problem

1982 ◽  
Vol 14 (2) ◽  
pp. 109-113 ◽  
Author(s):  
Suleyman Tufekci
Keyword(s):  
Time Cost ◽  
Trade Off

Dual Goals for Speed and Accuracy on the Same Performance Task

2012 ◽  
Vol 11 (3) ◽  
pp. 118-126 ◽  
Author(s):  
Olive Emil Wetter ◽  
Jürgen Wegge ◽  
Klaus Jonas ◽  
Klaus-Helmut Schmidt
Keyword(s):  
Memory Scanning ◽  
Performance Task ◽  
Performance Tasks ◽  
Trade Off ◽  
Test Experiment ◽  
Trade Offs ◽  
New Finding ◽  
Sternberg Paradigm ◽  
Speed Accuracy ◽  
Speed And Accuracy

In most work contexts, several performance goals coexist, and conflicts between them and trade-offs can occur. Our paper is the first to contrast a dual goal for speed and accuracy with a single goal for speed on the same task. The Sternberg paradigm (Experiment 1, n = 57) and the d2 test (Experiment 2, n = 19) were used as performance tasks. Speed measures and errors revealed in both experiments that dual as well as single goals increase performance by enhancing memory scanning. However, the single speed goal triggered a speed-accuracy trade-off, favoring speed over accuracy, whereas this was not the case with the dual goal. In difficult trials, dual goals slowed down scanning processes again so that errors could be prevented. This new finding is particularly relevant for security domains, where both aspects have to be managed simultaneously.

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