A wide-range power-efficient CMOS phase-locked loop with a differential range-programmable VCO

2006 ◽  
Author(s):  
R.Y. Chen ◽  
Ming-Yu Hsieh ◽  
Peng-Min Peng
Keyword(s):  
Phase Locked Loop ◽  
Power Efficient ◽  
Wide Range

A power-efficient wide-range phase-locked loop

2002 ◽  
Vol 37 (1) ◽  
pp. 51-62 ◽  
Author(s):  
O.T.-C. Chen ◽  
R.R.-B. Sheen
Keyword(s):  
Phase Locked Loop ◽  
Power Efficient ◽  
Wide Range

scholarly journals Implementation of Power-Efficient Class AB Miller Amplifiers Using Resistive Local Common-Mode Feedback

2021 ◽  
Vol 11 (3) ◽  
pp. 31
Author(s):  
Anindita Paul ◽  
Mario Renteria-Pinon ◽  
Jaime Ramirez-Angulo ◽  
Ricardo Bolaños-Pérez ◽  
Héctor Vázquez-Leal ◽  
...  
Keyword(s):  
Current Efficiency ◽  
Figure Of Merit ◽  
Small Signal ◽  
Common Mode ◽  
Power Efficient ◽  
Class Ab ◽  
Op Amp ◽  
Class A ◽  
Wide Range ◽  
Quiescent Current

An approach to implement single-ended power-efficient static class-AB Miller op-amps with symmetrical and significantly enhanced slew-rate and accurately controlled output quiescent current is introduced. The proposed op-amp can drive a wide range of resistive and capacitive loads. The output positive and negative currents can be much higher than the total op-amp quiescent current. The enhanced performance is achieved by utilizing a simple low-power auxiliary amplifier with resistive local common-mode feedback that increases the quiescent power dissipation by less than 10%. The proposed class AB op-amp is characterized by significantly enhanced large-signal dynamic, static current efficiency, and small-signal figures of merits. The dynamic current efficiency is 15.6 higher, the static current efficiency is 8.9 times higher, and the small-signal figure of merit is 2.3 times higher than the conventional class-A op-amp. A global figure of merit that determines an op-amp’s ultimate speed is 6.33 times higher than the conventional class A op-amp.

Design of high-frequency wide-range all digital phase locked loop in 90 nm CMOS

2013 ◽  
Vol 75 (1) ◽  
pp. 133-145 ◽  
Author(s):  
Prashanth Muppala ◽  
Saiyu Ren ◽  
George Yu-Heng Lee
Keyword(s):  
High Frequency ◽  
Phase Locked Loop ◽  
Digital Phase ◽  
Wide Range

Single Phase Variable Sampling Phase Locked Loop using Composite Observer

2016 ◽  
Vol 2 (1) ◽  
pp. 49
Author(s):  
K Arun ◽  
K Selvajyothi
Keyword(s):  
Sampling Period ◽  
Phase Locked Loop ◽  
Pole Placement ◽  
Phase Variable ◽  
Variable Sampling ◽  
Drift Frequency ◽  
Wide Range ◽  
Periodic Input ◽  
The Stability ◽  
Placement Technique

<p>An observer based variable sampling period phase locked loop is introduced for grid connected systems. The composite observer acts as an efficient estimator of the fundamental components from a periodic input signal rich in DC and harmonics. The observer gains are designed using pole placement technique, which inherently ensures the stability of this estimator.  Even under drift frequency, a constant number of samples (512) per cycle are maintained with the help of the numerically controlled oscillator. This makes the oscillator gain elements in the observer a constant and eliminates the trigonometric computation. This phase locked loop is found to be working in a wide range of frequency 40 – 70Hz. The performance of the proposed scheme is studied with a synthetic harmonic rich signal as well as validated by implementing the PLL in Cyclone IV FPGA with a real time grid voltage.</p>

An Ultra-Wide Range Digitally Adaptive Control Phase Locked Loop with New 3-Phase Switched Capacitor Loop Filter

2007 ◽  
Vol E90-C (6) ◽  
pp. 1197-1202
Author(s):  
S. DOSHO ◽  
N. YANAGISAWA ◽  
K. SOGAWA ◽  
Y. YAMADA ◽  
T. MORIE
Keyword(s):  
Adaptive Control ◽  
Phase Locked Loop ◽  
Switched Capacitor ◽  
Loop Filter ◽  
Control Phase ◽  
Wide Range

Broadband and wide-range feedback tuning scheme for phase-locked loop stabilization of tunable optoelectronic oscillators

2015 ◽  
Vol 40 (24) ◽  
pp. 5858 ◽  
Author(s):  
Xingyuan Xu ◽  
Jian Dai ◽  
Yitang Dai ◽  
Feifei Yin ◽  
Yue Zhou ◽  
...  
Keyword(s):  
Phase Locked Loop ◽  
Wide Range ◽  
Optoelectronic Oscillators ◽  
Tuning Scheme

scholarly journals Power Efficient, Low Noise 2-5 GHz Phase Locked Loop

2011 ◽  
Vol 16 (4) ◽  
pp. 66-72
Author(s):  
V.Sh. Melikyan ◽  
A.A. Durgaryan ◽  
H.P. Petrosyan ◽  
A.G. Stepanyan
Keyword(s):  
Power Consumption ◽  
Efficient Solution ◽  
Phase Locked Loop ◽  
Low Noise ◽  
System Level ◽  
Voltage Controlled Oscillator ◽  
Power Efficient ◽  
Area Overhead ◽  
Output Noise ◽  
5 Ghz

A power and noise efficient solution for phase locked loop (PLL) is presented. A lock detector is implemented to deactivate the PLL components, except the voltage controlled oscillator (VCO), in the locked state. Signals deactivating/activating the PLL are discussed on system level. The introduced technique significantly saves power and decreases PLL output jitter. As a result whole PLL power consumption and output noise decreased about 35-38% in expense of approximately 17% area overhead

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