Dynamics of Photovoltaic-Generator-Interfacing Voltage-Controlled Buck Power Stage

This brief review focuses on inverter technologies for connecting photovoltaic (PV) modules to a single-phase grid. The inverters are categorized into four classifications: 1) the number of power processing stages in cascade; 2) the type of power decoupling between the PV odule(s) and the single-phase grid; 3) whether they utilizes a transformer (either line or high frequency) or not; and 4) the type of grid-connected power stage. Various inverter topologies are presented, with issues related to grid connected & standalone applications

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A Novel SiC Device Modeling With Power Stage and Gate Driver Decoupling

10.1109/cieec50170.2021.9511044 ◽

2021 ◽

Author(s):

Qing Xin ◽

Han Peng ◽

Zhipeng Cheng ◽

Jimin Chen

Keyword(s):

Device Modeling ◽

Power Stage ◽

Gate Driver

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Detailed Analysis of How Power Stage and Power Clip Products Achieve Optimized Power Density

International Symposium on Microelectronics ◽

10.4071/isom-2013-wp66 ◽

2013 ◽

Vol 2013 (1) ◽

pp. 000782-000789

Author(s):

Arthur Black

Keyword(s):

Detailed Analysis ◽

Power Density ◽

Synchronous Rectifier ◽

Power Stage

The power stage and power clip packages are designed to increase the power density, in a synchronous rectifier (SR) buck application, while using a significantly smaller PCB land pattern area than a conventional discrete pair of MOSFETs. This paper presents a detailed analysis of how these new Fairchild dual-die designs achieve this performance.

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Dual-Input Isolated DC-DC Converter with Ultra-High Step-Up Ability Based on Sheppard Taylor circuit

Electronics ◽

10.3390/electronics8101125 ◽

2019 ◽

Vol 8 (10) ◽

pp. 1125 ◽

Cited By ~ 5

Author(s):

Shen ◽

Chen ◽

Chen

Keyword(s):

Theoretical Analysis ◽

Hardware Implementation ◽

Lower Cost ◽

Voltage Gain ◽

Theoretical Derivation ◽

Stage Design ◽

Control Approach ◽

Power Stage ◽

Voltage Clamping ◽

Switch Voltage

A dual-input high step-up isolated converter (DHSIC) is proposed in this paper, which incorporates Sheppard Taylor circuit into power stage design so as to step up voltage gain. In addition, the main circuit adopts boosting capacitors and switched capacitors, based on which the converter voltage gain can further be improved significantly. Since the proposed converter possesses an inherently ultra-high step-up feature, it is capable of processing low input voltages. The DHSIC also has the important features of leakage energy recycling, switch voltage clamping, and continuous input-current obtaining. These characteristics advantage converter efficiency and benefit the DHSIC for high power applications. The structure of the proposed converter is concise. That is, it can lower cost and simplifies control approach. The operation principle and theoretical derivation of the proposed converter are discussed thoroughly in this paper. Simulations and hardware implementation are carried out to verify the correctness of theoretical analysis and to validate feasibility of the converter as well.

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Optimized Digital Controllers for Switching-Mode DC-DC Step-Down Converter

Electronics ◽

10.3390/electronics7120412 ◽

2018 ◽

Vol 7 (12) ◽

pp. 412 ◽

Cited By ~ 6

Author(s):

Ghulam Abbas ◽

Jason Gu ◽

Umar Farooq ◽

Muhammad Abid ◽

Ali Raza ◽

...

Keyword(s):

Least Squares ◽

Dynamic Performance ◽

Nonlinear Least Squares ◽

Optimization Method ◽

Buck Converter ◽

Digital Controllers ◽

Real Zeros ◽

Power Stage ◽

Step Down ◽

Zeros And Poles

In this paper, a nonlinear least squares optimization method is employed to optimize the performance of pole-zero-cancellation (PZC)-based digital controllers applied to a switching converter. An extensively used step-down converter operating at 1000 kHz is considered as a plant. In the PZC technique, the adverse effect of the (unwanted) poles of the buck converter power stage is diminished by the complex or real zeros of the compensator. Various combinations of the placement of the compensator zeros and poles can be considered. The compensator zeros and poles are nominally/roughly placed while attempting to cancel the converter poles. Although PZC techniques exhibit satisfactory performance to some extent, there is still room for improvement of the controller performance by readjusting its poles and zeros. The (nominal) digital controller coefficients thus obtained through PZC techniques are retuned intelligently through a nonlinear least squares (NLS) method using the Levenberg-Marquardt (LM) algorithm to ameliorate the static and dynamic performance while minimizing the sum of squares of the error in a quicker way. Effects of nonlinear components such as delay, ADC/DAC quantization error, and so forth contained in the digital control loop on performance and loop stability are also investigated. In order to validate the effectiveness of the optimized PZC techniques and show their supremacy over the traditional PZC techniques and the ones optimized by genetic algorithms (GAs), simulation results based on a MATLAB/Simulink environment are provided. For experimental validation, rapid hardware-in-the-loop (HiL) implementation of the compensated buck converter system is also performed.

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