Cost-effective low-power processor-in-memory-based reconfigurable datapath for multimedia applications

2005 ◽  
Author(s):  
M. Lanuzza ◽  
M. Margala ◽  
P. Corsonello
Keyword(s):  
Low Power ◽  
Cost Effective ◽  
Multimedia Applications

An Innovative Low Cost Well Monitoring Solution: W.A.N.D

2021 ◽  
Author(s):  
Jean Grégoire Boero Rollo ◽  
John Richard Ordonez Varela ◽  
Tayssir Ben Ghzaiel ◽  
Cedric Mouanga ◽  
Arnaud Luxey ◽  
...  
Keyword(s):  
Magnetic Field ◽  
Low Power ◽  
Low Cost ◽  
Field Measurements ◽  
Cost Effective ◽  
Complex Environment ◽  
Sensor Device ◽  
Magnetic Field Measurements ◽  
Pipeline Monitoring ◽  
Harsh Conditions

Abstract Wireless Autonomous Nano-sensor Device (WAND) system is a disruptive cost-effective micro-system for well monitoring. It allows to realize pressure, temperature, inertial, and magnetic field measurements in harsh conditions; it also offers Bluetooth low-power communication and Wireless charging capabilities. Analysis’ results of an industrial offshore pilot realized in Congo (a world first in O&G industry in such complex environment), and major improvements implemented after this pilot are reported in this paper. Accomplished advancements comprise hardware and software developments extending operation lifetime, and simplifying on-site utilization. To date, there is not a commercial solution of this type in the market, the realization of this project is a real innovation allowing practical and low-cost monitoring during well intervention while minimizing the risks associated with standard Rigless intervention. Other applications regarding dry-tree wells on tension-leg platforms (TLP), drilling and completion operations, and pipeline monitoring are being investigated, too.

scholarly journals Bidirectional DC/DC Power Converter for Hybrid Yacht Propulsion System

2018 ◽  
Vol 2 (Special edition 2) ◽  
pp. 133-142
Author(s):  
Saša Sladić ◽  
Damir Kolić ◽  
Marko Šuljić
Keyword(s):  
Low Power ◽  
Critical Points ◽  
High Power ◽  
Thermal Imaging ◽  
Cost Effective ◽  
Power Converter ◽  
Propulsion System ◽  
Typical Application ◽  
Electric Drives ◽  
Dc Power

Typical application of bidirectional DC/DC power converter exists in hybrid cars. Recently, a similar approach has been applied in hybrid propelled ships as well. In this paper, a novel low power bidirectional DC/DC power converter of standard Buck/Boost topology has ben designed in order to explore possibilities of the high power design in maritime applications. In order to discover critical points of a design, thermal imaging has been investigated. The results clearly indicate that the proposed solution is more cost effective than a typical standard bidirectional DC/DC power converter. Likewise, the improvement in maneuvering of the propelled vessel system with two and more electric drives has been investigated and compared to a classical diesel, single engine propulsion system.

Ultra-low-power time-efficient circuitry of dual comparator/amplifier for SAR ADC by CMOS technology

Circuit World ◽  
2020 ◽  
Vol 46 (3) ◽  
pp. 183-192
Author(s):  
Muhammad Yasir Faheem ◽  
Shun'an Zhong ◽  
Xinghua Wang ◽  
Muhammad Basit Azeem
Keyword(s):  
Low Power ◽  
Energy Efficient ◽  
Supply Voltage ◽  
Main Idea ◽  
Cost Effective ◽  
Cmos Technology ◽  
Sar Adc ◽  
Ultra Low Power ◽  
Content Type ◽  
Analogue To Digital

Purpose Successive approximation register (SAR) analogue to digital converter (ADC) is well-known with regard to low-power operations. To make it energy-efficient and time-efficient, scientists are working for the last two decades, and it still needs the attention of the researchers. In actual work, there is no mechanism and circuitry for the production of two simultaneous comparator outputs in SAR ADC. Design/methodology/approach A small-sized, low-power and energy-efficient circuitry of a dual comparator and an amplifier is presented, which is the most important part of SAR ADC. The main idea is to design a multi-dimensional circuit which can deliver two quick parallel comparisons. The circuitry of the three devices is combined and miniaturized by introducing a lower number of MOSFET’s and small-sized capacitors in such a way that there is no need for any matching and calibration. Findings The supply voltage of the proposed comparator is 0.7 V with the overall power consumption of 0.257mW. The input and clock frequencies are 5 and 50 MHz, respectively. There is no requirement for any offset calibration and mismatching concerns due to sharing and centralization of spider-latch circuitry. The total offset voltages are 0.13 0.31 mV with 0.3VDD to VDD. All the components are small-sized and miniaturized to make the circuit cost-effective and energy-efficient. The rise and response time of comparator is around 100 ns. SNDR improved from 56 to 65 dB where the input-referred noise of an amplifier is 98mVrms. Originality/value The proposed design has no linear-complexity compared with the conventional comparator in both modes (working and standby); it is ultimately intended and designed for 11-bit SAR ADC. The circuit based on three rapid clock pulses for three different modes includes amplification and two parallel comparisons controlled and switched by a latch named as “spider-latch”.

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