scholarly journals A 1.5 V CMOS high-speed 16-bit∖8-bit divider using the quotient-select architecture and true-single-phase bootstrapped dynamic circuit techniques suitable for low-voltage VLSI

Author(s):  
C.C. Yeh ◽  
J.H. Lou ◽  
J.B. Kuo
Energies ◽  
2020 ◽  
Vol 13 (4) ◽  
pp. 934
Author(s):  
Yanwen Wang ◽  
Le Wang ◽  
Sven G. Bilén ◽  
Yan Gao

Due to the working condition of low-voltage cabling from the mining flameproof movable substation to the loads of the mining face being poor, it is easy to cause various external mechanical damages to the cable sheaths. Furthermore, a single-phase earth leakage fault or short-circuit fault can occur when the low-voltage cable sheaths are damaged, and electric sparks caused by these faults can lead to a gas explosion. As the gas detonation time caused by the above faults is usually more than 5 ms, the high-speed interruption solid-state switch which controls the cables must cut off the current within 3 ms. This requires the action time of the solid-state switch to be less than 1 ms, and at the same time, the sampling and calculation time of the relay protection must be less than 2 ms. Based on these problems, this paper proposes the use of a high-speed solid-state circuit breaker (SSCB) topology at the neutral point of transformer, and analyzes the conduction mechanism and shut-off mechanism of the current of the SSCB. It presents an ultra-high-speed algorithm based on pattern recognition of single-phase earth leakage fault protection, and an ultra-high-speed algorithm of short-circuit fault which is based on the rate-of-change of the current. Finally, through computer simulation experiments and semi-physical simulation experiments, the feasibility of the above three technologies is verified to ensure that when a single-phase earth leakage fault or short-circuit fault occurs in the low-voltage cable, the solid-state switch which is installed in the mining flameproof movable substation will cut off the current within 3 ms.


Energies ◽  
2020 ◽  
Vol 13 (7) ◽  
pp. 1550
Author(s):  
Min-Sup Song ◽  
In-Ho Cho ◽  
Jae-Bum Lee

As high-capacity alternating current/direct current (ac/dc) power conversion systems, single-phase pulse-width modulation (PWM) converters used in high-speed railway propulsion systems adopt high-voltage Insulated-Gate Bipolar Transistors (IGBTs) as switching elements. Due to their high breakdown voltage characteristics, the switching dynamics are inferior to those of low-voltage IGBTs and switching losses are more dominant than conduction losses despite operating at relatively low switching frequencies of hundreds to several kHz. To solve this problem, this paper proposes ± 180° discontinuous PWM (DPWM) suitable for a single-phase circuit. With the simple addition of offset voltages, the proposed DPWM method can be implemented easily and switching losses can be reduced by half by clamping the switching legs of the H-bridge converter to the positive or negative dc rail during every half cycle. In addition, temperature deviation between the power stacks can be minimized by using selective application of clamping modes. The validity and effectiveness of the proposed DPWM are verified through simulations and experiments of a prototype converter.


Nanophotonics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 1765-1773
Author(s):  
Yi Zhang ◽  
Jianfeng Gao ◽  
Senbiao Qin ◽  
Ming Cheng ◽  
Kang Wang ◽  
...  

Abstract We design and demonstrate an asymmetric Ge/SiGe coupled quantum well (CQW) waveguide modulator for both intensity and phase modulation with a low bias voltage in silicon photonic integration. The asymmetric CQWs consisting of two quantum wells with different widths are employed as the active region to enhance the electro-optical characteristics of the device by controlling the coupling of the wave functions. The fabricated device can realize 5 dB extinction ratio at 1446 nm and 1.4 × 10−3 electrorefractive index variation at 1530 nm with the associated modulation efficiency V π L π of 0.055 V cm under 1 V reverse bias. The 3 dB bandwidth for high frequency response is 27 GHz under 1 V bias and the energy consumption per bit is less than 100 fJ/bit. The proposed device offers a pathway towards a low voltage, low energy consumption, high speed and compact modulator for silicon photonic integrated devices, as well as opens possibilities for achieving advanced modulation format in a more compact and simple frame.


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