Differential input output CMOS (DINO-CMOS) — High performance and energy efficient logic family

2017 ◽  
Author(s):  
M. Haber ◽  
I. Levi ◽  
Y. Yehoshua ◽  
A. Fish
Keyword(s):  
Energy Efficient ◽  
High Performance ◽  
Input Output ◽  
Differential Input

scholarly journals Design of Energy Efficient Control Unit and Implementation on High Performance FPGA

2019 ◽  
Vol 8 (12S2) ◽  
pp. 23-26
Keyword(s):  
Power Consumption ◽  
Energy Efficient ◽  
Field Programmable Gate Array ◽  
High Performance ◽  
Control Unit ◽  
Input Output ◽  
Green Communication ◽  
Power Efficient ◽  
Efficient Control ◽  
Field Programmable

With the crisis of power across the globe, green communication and power-efficient devices are getting more and more attention. This work emphasis about the implementation of Control Unit (CU) circuit on FPGA kit. In this project, power consumption of CU circuit is analyzed by changing the different Input/Output (I/O) standards of FPGA. This project is implemented on Xilinx 14.1 tool and the power consumption on CU is calculated with X Power Analyzer tool on 28-Nano-Meter (nm) Artix-7 Field Programmable Gate Array (FPGA). Out of different I/O standards, CU circuit is most power efficient with LVCMOS I/O standard on Artix-7 FPGA

scholarly journals Design of Energy Efficient Control Unit and Implementation on High Performance FPGA

2019 ◽  
Vol 8 (12S2) ◽  
pp. 23-26
Keyword(s):  
Power Consumption ◽  
Energy Efficient ◽  
Field Programmable Gate Array ◽  
High Performance ◽  
Control Unit ◽  
Input Output ◽  
Green Communication ◽  
Power Efficient ◽  
Efficient Control ◽  
Field Programmable

With the crisis of power across the globe, green communication and power-efficient devices are getting more and more attention. This work emphasis about the implementation of Control Unit (CU) circuit on FPGA kit. In this project, power consumption of CU circuit is analyzed by changing the different Input/Output (I/O) standards of FPGA. This project is implemented on Xilinx 14.1 tool and the power consumption on CU is calculated with X Power Analyzer tool on 28-Nano-Meter (nm) Artix-7 Field Programmable Gate Array (FPGA). Out of different I/O standards, CU circuit is most power efficient with LVCMOS I/O standard on Artix-7 FPGA.

Challenges And Energy Efficient Techniques For High Performance Wireless Communications

2015 ◽  
Vol 1 (4) ◽  
pp. 1-12
Author(s):  
Chidadala Janardhan ◽  
◽  
Bhagath Pyda ◽  
J. Manohar ◽  
K. V. Ramanaiah ◽  
...  
Keyword(s):  
Wireless Communications ◽  
Energy Efficient ◽  
High Performance

scholarly journals Thread Batching for High-performance Energy-efficient GPU Memory Design

2019 ◽  
Vol 15 (4) ◽  
pp. 1-21
Author(s):  
Bing Li ◽  
Mengjie Mao ◽  
Xiaoxiao Liu ◽  
Tao Liu ◽  
Zihao Liu ◽  
...  
Keyword(s):  
Energy Efficient ◽  
High Performance ◽  
Memory Design

A novel high-performance and energy-efficient RRAM device with multi-functional conducting nanofilaments

Nano Energy ◽  
2021 ◽  
Vol 82 ◽  
pp. 105717
Author(s):  
Min-Ci Wu ◽  
Jui-Yuan Chen ◽  
Yi-Hsin Ting ◽  
Chih-Yang Huang ◽  
Wen-Wei Wu
Keyword(s):  
Energy Efficient ◽  
High Performance

High performance self-heated membrane distillation system for energy efficient desalination process

2021 ◽  
Author(s):  
Wei-Song Hung ◽  
Subrahmanya T M ◽  
Po Ting Lin ◽  
Yu-Hsuan Chiao ◽  
Januar Widakdo ◽  
...  
Keyword(s):  
Environmental Pollution ◽  
Energy Efficient ◽  
High Performance ◽  
Membrane Distillation ◽  
Energy Crisis ◽  
Safe Water ◽  
Global Challenges ◽  
Promising Strategy ◽  
Distillation System

Membrane distillation (MD) based desalination process is thought to be a promising strategy to address global challenges such as safe water-energy crisis and environmental pollution. Here, we demonstrate a novel...

scholarly journals High-Performance Multi-Stream Management for SSDs

Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 486
Author(s):  
Yongjae Chun ◽  
Kyeore Han ◽  
Youpyo Hong
Keyword(s):  
Solid State ◽  
High Performance ◽  
Data Centers ◽  
Consumer Electronics ◽  
Input Output ◽  
Solid State Drives ◽  
Stream Management ◽  
Group Data ◽  
Separate Area

Owing to their advantages over hard disc drives (HDDs), solid-state drives (SSDs) are widely used in many applications, including consumer electronics and data centers. As erase operations are feasible only in block units, modification or deletion of pages cause invalidation of the pages in their corresponding blocks. To reclaim these invalid pages, the valid pages in the block are copied to other blocks, and the block with the invalid pages is initialized, which adversely affects the performance and durability of the SSD. The objective of a multi-stream SSD is to group data by their expected lifetimes and store each group of data in a separate area called a stream to minimize the frequency of wasteful copy-back and initialization operations. In this paper, we propose an algorithm that groups the data based on input/output (I/O) types and rewrite frequency, which show significant improvements over existing multi-stream algorithms not only for performance but also for effectiveness in covering most applications.

Energy Efficient VLSI Based DCT Architecture with Accurate Error Compensation

2014 ◽  
Vol 626 ◽  
pp. 127-135 ◽  
Author(s):  
D. Jessintha ◽  
M. Kannan ◽  
P.L. Srinivasan
Keyword(s):  
Low Power ◽  
Energy Efficient ◽  
Time Complexity ◽  
High Performance ◽  
Low Power Consumption ◽  
Distributed Arithmetic ◽  
Technology Scaling ◽  
Truncation Errors ◽  
History Of ◽  
Technology Dependency

Discrete Cosine Transform (DCT) is commonly used in image compression. In the history of DCT, a milestone was the Distributed Arithmetic (DA) technique. Due to the technology dependency a multiplier-less computation was built with DA based technique. It occupied less area but the throughput is less. Later, due to the technology scaling, multiplier based architectures can be easily adapted for low-power and high-performance architecture. Fixed width multipliers [1]-[7] reduces hardware and time complexity. In this work, Radix 4 fixed width multiplier is adapted with DCT architecture due to low power consumption and saves 30% power. In order to reduce truncation errors caused during fixed width multiplication, an estimation circuit is designed based on conditional probability theory.

DEVELOPMENT AND ANALYSIS OF A NOVEL KIND OF SMART THERMOTROPIC MATERIAL

2010 ◽  
Vol 03 (02) ◽  
pp. 135-139 ◽  
Author(s):  
JIAN YAO ◽  
CHENG-WEN YAN
Keyword(s):  
Energy Efficient ◽  
High Performance ◽  
Pure Water ◽  
Methyl Cellulose ◽  
Spectral Transmittance ◽  
Thermally Induced ◽  
Scattering State ◽  
Turbid State ◽  
Mixing Proportion ◽  
Switching Temperature

Thermally induced switching temperature and spectral transmittance of a novel kind of smart thermotropic material developed by a different mixing proportion of hydroxypropyl methyl cellulose (HPMC), sodium chloride ( NaCl ) and pure water was measured. Radiation transmittance measurements were carried out on a thermotropic double glazing window sample, a double glazing window and a low-E double glazing window. Results show that the thermotropic double-glazed window with optimum mixing proportion of HPMC, NaCl and pure water of 2:10:100 by mass-reduces radiation transmittance at fully turbid state by up to 72% and 32% respectively, compared to the ordinary double-glazed window and low-E double-glazed window which do not have adjustable radiation transmittance; its radiation transmittance changed from transparent state to light scattering state up to 60%, indicating a high performance on switching solar radiation and a great potential for energy efficient windows.

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