A Local Parallel Search Approach for Memory Failure Pattern Identification

2016 ◽  
Vol 65 (3) ◽  
pp. 770-780 ◽  
Author(s):  
Bing-Yang Lin ◽  
Cheng-Wen Wu ◽  
Mincent Lee ◽  
Hung-Chih Lin ◽  
Ching-Nen Peng ◽  
...  
Author(s):  
A.C.T Quah ◽  
G. B. Ang ◽  
C. Q. Chen ◽  
David Zhu ◽  
M. Gunawardana ◽  
...  

Abstract This paper describes a low yield case which results in a unique 68 mm single ring wafer sort failure pattern. A systematic problem solving approach with the application various FA techniques and detailed Fab investigation resolved the issue. The root cause for the unique ring failure pattern was due to a burr at the implanter load lock. The burr scratched and toppled the photoresist resulting in subsequent blocked well implantation and memory failure.


2009 ◽  
Vol 25 (2) ◽  
pp. 115-122 ◽  
Author(s):  
Despina Moraitou ◽  
Anastasia Efklides

Metacognitive awareness of memory failure may take the form of the “blank in the mind” (BIM) experience. The BIM experience informs the person of a temporary memory failure and takes the form of a disruption in the flow of consciousness, of a moment of no content in awareness. The aim of the present study was to examine the psychometric properties of the Blank in the Mind Questionnaire (BIMQ) designed to tap the BIM experience and differentiate it from other memory-related experiences, such as searching but not having in memory a piece of information (i.e., lack of knowledge). The participants (N = 493) were 249 younger adults (18–30 years old) and 244 older adults (63–89 years old) of both genders. Confirmatory factor analysis applied to the BIMQ confirmed a three-factor model with interrelations between the factors. The first factor represented the experience of lack of knowledge, the second represented the experience of BIM, and the third the person’s negative affective reactions to memory failure. The internal consistency of the three factors ranged from Cronbach’s α = .80 to .88. Convergent validity was shown with correlations of the BIMQ factors with self-report measures of cognitive and memory failures, and to the negative-affect subscale of the Positive and Negative Affect Schedule (PANAS).


Author(s):  
Z. G. Song ◽  
S. K. Loh ◽  
X. H. Zheng ◽  
S.P. Neo ◽  
C. K. Oh

Abstract This article presents two cases to demonstrate the application of focused ion beam (FIB) circuit edit in analysis of memory failure of silicon on insulator (SOI) devices using XTEM and EDX analyses. The first case was a single bit failure of SRAM units manufactured with 90 nm technology in SOI wafer. The second case was the whole column failure with a single bit pass for a SRAM unit. From the results, it was concluded that FIB circuit edit and electrical characterization is a good methodology for further narrowing down the defective location of memory failure, especially for SOI technology, where contact-level passive voltage contrast is not suitable.


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