A Statistical Evaluation of Error Detection Cyclic Codes for Data Transmission

1964 ◽  
Vol 12 (2) ◽  
pp. 211-216 ◽  
Author(s):  
F. Corr
Keyword(s):  
Error Detection ◽  
Data Transmission ◽  
Statistical Evaluation ◽  
Cyclic Codes

scholarly journals CRC 8-bit Encoder-Decoder Component in FPGA using VHDL

2020 ◽  
Vol 8 (1) ◽  
pp. 58
Author(s):  
ANDHI RACHMAN SALEH ◽  
SUNNY ARIEF SUDIRO
Keyword(s):  
Error Detection ◽  
Data Transmission ◽  
Cyclic Codes ◽  
High Reliability ◽  
Asynchronous Transfer Mode ◽  
Integrated Services ◽  
Integrated Services Digital Network ◽  
Cyclic Redundancy Check ◽  
Transfer Mode ◽  
Digital Network

AbstrakCyclic Redundancy Check (CRC) adalah salah satu jenis dari deteksi kesalahan yang digunakan pada pengiriman data. CRC umumnya digunakan di jaringan digital dan perangkat penyimpanan untuk mendeteksi perubahan tidak disengaja pada data asli. CRC memiliki keandalan yang tinggi dalam pengiriman data karena CRC menggunakan algoritma berdasarkan cyclic code. Pada artikel ini generator polinomial yang digunakan dalam encoder dan decoder adalah CCITT  dan dengan lebar bit data 8 bit. CRC-8-CCITT biasanya digunakan pada Asynchronous Transfer Mode (ATM) headers, Integrated Services Digital Network (ISDN) HEC, dll. Pada penelitian ini dilakukan perancangan dan diterapkan dengan menggunakan VHDL. Software pendukung yang digunakan untuk mengimplementasikan VHDL adalah Xilinx ISE 8.1i.Kata kunci: Cyclic Redundancy Check (CRC), VHDL Language, Xilinx ISE 8.1iAbstractCyclic Redundancy Check (CRC) is one type of error detection used in data transmission. CRC commonly used in digital networks and storage devices to detect accidental changes to raw data. CRC has high reliability in data transmission because uses algorithms based on cyclic codes. In this article the polynomial generator used in the encoder and decoder is the CCITT  and with a width of 8 bits data bits.CRC-8-CCITT usually used at Asynchronous Transfer Mode (ATM) headers, Integrated Services Digital Network (ISDN) HEC, etc. This article presents design and implementation of a component using VHDL. The supporting software used to implement VHDL is Xilinx ISE 8.1i.Keywords: Cyclic Redundancy Check (CRC), VHDL Language, Xilinx ISE 8.1i

scholarly journals A simple, label-free, electrochemical DNA parity generator/checker for error detection during data transmission based on “aptamer-nanoclaw”-modulated protein steric hindrance

2018 ◽  
Vol 9 (34) ◽  
pp. 6981-6987 ◽  
Author(s):  
Daoqing Fan ◽  
Yongchao Fan ◽  
Erkang Wang ◽  
Shaojun Dong
Keyword(s):  
Error Detection ◽  
Steric Hindrance ◽  
Data Transmission ◽  
Label Free ◽  
Parity Generator

The first electrochemical DNA parity generator/checker system for error detection during data transmission was constructed based on “aptamer-nanoclaw”-modulated protein steric hindrance.

Comparing the Power of Quality-Control Rules to Detect Persistent Increases In Random Error

1992 ◽  
Vol 38 (3) ◽  
pp. 364-369 ◽  
Author(s):  
C A Parvin
Keyword(s):  
Quality Control ◽  
Error Detection ◽  
Statistical Evaluation ◽  
Poor Performance ◽  
Operating Conditions ◽  
Evaluation Approach ◽  
Control Rules ◽  
Stable Operating ◽  
Alternative Approach ◽  
Analytical Imprecision

Abstract This paper continues an investigation into the merits of an alternative approach to the statistical evaluation of quality-control rules. In this report, computer simulation is used to evaluate and compare quality-control rules designed to detect increases in within-run or between-run imprecision. When out-of-control conditions are evaluated in terms of their impact on total analytical imprecision, the error detection ability of a rule depends on the relative magnitudes of the between-run and within-run error components under stable operating conditions. A recently proposed rule based on the F-test, designed to detect increases in between-run imprecision, is shown to have relatively poor performance characteristics. Additionally, several issues are examined that have been difficult to address with the traditional evaluation approach.

scholarly journals A DNA-based parity generator/checker for error detection through data transmission with visual readout and an output-correction function

2017 ◽  
Vol 8 (3) ◽  
pp. 1888-1895 ◽  
Author(s):  
Daoqing Fan ◽  
Erkang Wang ◽  
Shaojun Dong
Keyword(s):  
Error Detection ◽  
Data Transmission ◽  
Correction Function ◽  
Naked Eye ◽  
G Quadruplex ◽  
Parity Generator

The first DNA-based molecular parity generator/checker, used for error detection through data transmission with fluorescent and visual readouts, has been constructed. The erroneous transmission can be readily distinguished by the naked eye using the G-quadruplex DNAzyme as a signal reporter of the visual outputs.

scholarly journals Implementation of High Security Cryptographic System with Improved Error Correction and Detection Rate using FPGA

2016 ◽  
Vol 6 (2) ◽  
pp. 602
Author(s):  
Narendra Babu T ◽  
Fazal Noorbasha ◽  
Leenendra Chowdary Gunnam
Keyword(s):  
Error Detection ◽  
Data Transmission ◽  
Detection Rate ◽  
Reliable Data ◽  
Linear Feedback ◽  
Bandwidth Efficiency ◽  
Cryptographic System ◽  
Feedback Shift Register ◽  
Orthogonal Code ◽  
Error Detection Rate

In this article, an encryption algorithm with an error detection technique is presented for highly secured reliable data transmission over unreliable communication channels. In this algorithm, an input data is mapped into orthogonal code first. After that the code is encrypted with the help of Linear Feedback Shift Register (LFSR). The technique has been successfully verified and synthesized using Xilinx by Spartan-3E FPGA. The results show that the error detection rate has been increased to 100% by proposed encryption scheme is effective and improves bandwidth efficiency.

Modeling of Aircraft and RPAS Data Transmission via Satellites

2021 ◽  
pp. 187-236
Author(s):  
Andrii Mikhailovich Grekhov
Keyword(s):  
Error Detection ◽  
Data Transmission ◽  
Information Transfer ◽  
Satellite Communication ◽  
Path Loss ◽  
Convolutional Codes ◽  
High Power Amplifier ◽  
Modulation Type ◽  
Amplifier Gain ◽  
Downlink Channels

This chapter is devoted to the modeling of aircraft data transmission via low-orbit satellites. Satellite communication channel models were designed, which allow to investigate BER dependencies on the type of signal modulation, information transfer rate, signal power, antenna diameters, and nonlinearity of a high power amplifier. Impact of a modulation type (BPSK, QPSK, 8PSK, 16QAM), Eb / N0, satellite transponder amplifier gain without and with coding on a BER was investigated. Effectiveness of error detection and correction was analyzed using classic linear block and convolutional codes. Free space path loss, AWGN, and radio frequency satellite channels were considered. MIMO 2 × 1 and 3 × 2 fading uplink/downlink channels with antenna diversity were analyzed. Results were compared with AWGN uplink/downlink channels. On the base of these models, channels integrity was investigated.

Implementation of High Security Cryptographic System with Improved Error Correction and Detection Rate using FPGA

2016 ◽  
Vol 6 (2) ◽  
pp. 602
Author(s):  
Narendra Babu T ◽  
Fazal Noorbasha ◽  
Leenendra Chowdary Gunnam
Keyword(s):  
Error Detection ◽  
Data Transmission ◽  
Detection Rate ◽  
Reliable Data ◽  
Linear Feedback ◽  
Bandwidth Efficiency ◽  
Cryptographic System ◽  
Feedback Shift Register ◽  
Orthogonal Code ◽  
Error Detection Rate

In this article, an encryption algorithm with an error detection technique is presented for highly secured reliable data transmission over unreliable communication channels. In this algorithm, an input data is mapped into orthogonal code first. After that the code is encrypted with the help of Linear Feedback Shift Register (LFSR). The technique has been successfully verified and synthesized using Xilinx by Spartan-3E FPGA. The results show that the error detection rate has been increased to 100% by proposed encryption scheme is effective and improves bandwidth efficiency.

SEC-CMAC A New Message Authentication Code Based on the Symmetrical Evolutionist Ciphering Algorithm

2018 ◽  
Vol 12 (3) ◽  
pp. 16-26 ◽  
Author(s):  
Bouchra Echandouri ◽  
Fouzia Omary ◽  
Fatima Ezzahra Ziani ◽  
Anas Sadak
Keyword(s):  
Computer Security ◽  
Error Detection ◽  
Data Transmission ◽  
Data Security ◽  
Data Communication ◽  
Message Authentication ◽  
Security Requirement ◽  
Message Authentication Code ◽  
Authentication Code ◽  
Suggested Algorithm

This article describes how the simplicity of data transmission made eavesdropping by malicious people easier. This became one the flaws of computer security that needs to be handled. In order to establish a secure data communication, many data security techniques were developed to ensure privacy, integrity and authenticity. One of the techniques developed was to fulfill authentication with a message authentication code (MAC) that was defined by the National Institute of Standards and Technology. It is still a powerful data integrity and authentication tool that provides better protection than error detection codes or checksums. In this article, the authors propose a new cipher-based message authentication code (CMAC) algorithm. Their proposed algorithm, termed SEC-CMAC, is based on a previously developed symmetric evolutionist ciphering algorithm named symmetrical evolutionist ciphering (SEC). Compared to the well-known previously developed MAC, their suggested algorithm proved to be robust and fulfill some security requirement by resisting an exhaustive key search and mac forgery attacks.

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