Integral Nonlinearity of ADC's Conversion Characteristic Identification

Author(s):  
Roman Kochan ◽  
Orest Kochan
Fuel ◽  
2021 ◽  
Vol 284 ◽  
pp. 119045
Author(s):  
Tianju Chen ◽  
Ruowei Dai ◽  
Dominic Yellezuome ◽  
Ke Zhang ◽  
Ruidong Zhao ◽  
...  

2019 ◽  
Vol 28 (03) ◽  
pp. 1950045
Author(s):  
Maliang Liu ◽  
Sirui Zhang ◽  
Hu Jin ◽  
Zhangming Zhu ◽  
Yintang Yang

A low complexity all-digital foreground calibration technique to correct linear and nonlinear errors is proposed for pipeline ADCs in this paper. This method based on the integral nonlinearity (INL) piecewise least-squares fitting improves the linearity and obtains better SNR and SFDR performance. Two switches are added to the pre-stage reference ladder to achieve an accurate measurement of the INL and DNL of the backend ADC, which reduces the calibration complexity and improves the linearity effectively. The method was applied to a 125[Formula: see text]MS/s 14-bit pipeline ADC fabricated in a 0.18[Formula: see text][Formula: see text]m CMOS process. The raw DNL and INL were 1[Formula: see text]LSB and 8[Formula: see text]LSB, respectively, without calibration, but with calibration, they were respectively improved to 0.25[Formula: see text]LSB and 2[Formula: see text]LSB. The ADC achieved an SNR of 64.5[Formula: see text]dB, an SFDR of 73.8[Formula: see text]dB and a THD of 72.7[Formula: see text]dB with a 10[Formula: see text]MHz input signal without calibration, but after calibration these figures were improved to 72.6[Formula: see text]dB, 87.5[Formula: see text]dB and 86.6[Formula: see text]dB, respectively. Its application can also be extended to SAR ADC architecture, etc.


2018 ◽  
Vol 9 (1) ◽  
pp. 20 ◽  
Author(s):  
Yuan-Ho Chen

This paper presents a time-to-digital converter (TDC) based on a field programmable gate array (FPGA) with a tapped delay line (TDL) architecture. This converter employs dual delay lines (DDLs) to enable real-time calibrations, and the proposed DDL-TDC measures the statistical distribution of delays to permit the calibration of nonuniform delay cells in FPGA-based TDC designs. DDLs are also used to set up alternate calibrations, thus enabling environmental effects to be immediately accounted for. Experimental results revealed that relative to a conventional TDL-TDC, the proposed DDL-TDC reduced the maximum differential nonlinearity by 26% and the integral nonlinearity by 30%. A root-mean-squared value of 32 ps was measured by inputting the constant delay source into the proposed DDL-TDC. The proposed scheme also maintained excellent linearity across a range of temperatures.


2010 ◽  
Vol 105-106 ◽  
pp. 709-712 ◽  
Author(s):  
Zhi Guo Tang ◽  
P.Y. Ma ◽  
J.P. Cheng ◽  
Y.L. Li ◽  
Q.Z. Lin

Hydrogen from biomass gasification is reviewed as one of the promising clean energies approaches in the future for fuel cell. However, the syngas from biomass gasification usually contains a certain amount of tar, which could not only decrease the efficiency of gasification process and hydrogen production, but also condense as a dense mixture and impose a series of serious problems. So “Excess Enthalpy Gasification (EEG)” is put forward and applied into biomass gasification and a novel biomass gasifier is presented for the purpose of tar-free and hydrogen-rich syngas in this work. The structure characteristic of the gasifier and tar conversion characteristic are analyzed detailedly to prove the feasibility and excellence performance for producing tar-free and hydrogen-rich syngas from biomass gasification.


Sign in / Sign up

Export Citation Format

Share Document