High-Performance Double-Channel Poly-Silicon Thin-Film Transistor With Raised Drain and Reduced Drain Electric Field Structures

2009 ◽  
Vol 56 (3) ◽  
pp. 441-447 ◽  
Author(s):  
Feng-Tso Chien ◽  
Chien-Nan Liao ◽  
Chin-Mu Fang ◽  
Yao-Tsung Tsai
2008 ◽  
Vol 29 (11) ◽  
pp. 1229-1231 ◽  
Author(s):  
Feng-Tso Chien ◽  
Chin-Mu Fang ◽  
Chien-Nan Liao ◽  
Chii-Wen Chen ◽  
Ching-Hwa Cheng ◽  
...  

2001 ◽  
Vol 22 (10) ◽  
pp. 472-474 ◽  
Author(s):  
Kow Ming Chang ◽  
Yuan Hung Chung ◽  
Gin Ming Lin ◽  
Jian Hong Lin ◽  
Chi Gun Deng

2003 ◽  
Author(s):  
Guglielmo Fortunato ◽  
Antonio Valletta ◽  
Alessandra Bonfiglietti ◽  
Massimo Cuscuna ◽  
Paolo Gaucci ◽  
...  

1998 ◽  
Vol 37 (Part 1, No. 12B) ◽  
pp. 7193-7197 ◽  
Author(s):  
Soo Young Yoon ◽  
Sung Ki Kim ◽  
Jae Young Oh ◽  
YoungJin Choi ◽  
Woo Sung Shon ◽  
...  

1996 ◽  
Vol 424 ◽  
Author(s):  
Seok-Woon Lee ◽  
Byung-IL Lee ◽  
Tae-Hyung Ihn ◽  
Tae-Kyung Kim ◽  
Young-Tae Kang ◽  
...  

AbstractHigh performance poly-Si thin film transistors were fabricated by using a new crystallization method, Metal-Induced Lateral Crystallization (MILC). The process temperature was kept below 500°C throughout the fabrication. After the gate definition, thin nickel films were deposited on top of the TFT's without an additional mask, and with a one-step annealing at 500°C, the activation of the dopants in source/drain/gate a-Si films was achieved simultaneously with the crystallization of the a-Si films in the channel area. Even without a post-hydrogenation passivation, mobilities of the MILC TFT's were measured to be as high as 120cm2/Vs and 90cm2/Vs for n-channel and p-channel, respectively. These values are much higher than those of the poly-Si TFT's fabricated by conventional solid-phase crystallization at around 6001C.


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