Frequency-Tuning Negative-Conductance Boosted Structure and Applications for Low-Voltage Low-Power Wide-Tuning-Range VCO

This paper presents a quadrature-clock generator based on a novel low-power ring oscillator with a wide frequency tuning range and low temperature variations. The proposed ring oscillator consists of two differential delay cells with a new controllable capacitive load of an MOS transistor. The wide tuning range is achieved due to transistor utilization in different regions and considering its resistance not to narrow down the frequency range. Delay cells are biased with a minimum possible value of a proportion to absolute temperature current to decrease frequency variations to temperature while the power consumption is kept low. The validation of the proposed methods is proved by circuit analysis. Post-layout simulation results of the proposed clock generator in 180[Formula: see text]nm CMOS technology are also presented. It exhibits a wide tuning range of 807 MHz to 2.66 GHz. The phase noise of the output signal is about [Formula: see text][Formula: see text]dBc/Hz at 10[Formula: see text]MHz offset frequency. Frequency changes less than [Formula: see text] in the temperature range of [Formula: see text]C–[Formula: see text]C. The clock generator consumes 0.657[Formula: see text]mW of power. Results show improvement in comparison to the previous works.

Download Full-text

An Ultra-Low-Power K-Band 22.2 GHz-to-26.9 GHz Current-Reuse VCO Using Dynamic Back-Gate-Biasing Technique

Electronics ◽

10.3390/electronics10080889 ◽

2021 ◽

Vol 10 (8) ◽

pp. 889

Author(s):

Xiaoying Deng ◽

Peiqi Tan

Keyword(s):

Power Consumption ◽

Low Power ◽

Tuning Range ◽

Frequency Tuning ◽

Cmos Process ◽

Voltage Controlled Oscillator ◽

Back Gate ◽

Ultra Low Power ◽

Current Reuse ◽

K Band

An ultra-low-power K-band LC-VCO (voltage-controlled oscillator) with a wide tuning range is proposed in this paper. Based on the current-reuse topology, a dynamic back-gate-biasing technique is utilized to reduce power consumption and increase tuning range. With this technique, small dimension cross-coupled pairs are allowed, reducing parasitic capacitors and power consumption. Implemented in SMIC 55 nm 1P7M CMOS process, the proposed VCO achieves a frequency tuning range of 19.1% from 22.2 GHz to 26.9 GHz, consuming only 1.9 mW–2.1 mW from 1.2 V supply and occupying a core area of 0.043 mm2. The phase noise ranges from −107.1 dBC/HZ to −101.9 dBc/Hz at 1 MHz offset over the whole tuning range, while the total harmonic distortion (THD) and output power achieve −40.6 dB and −2.9 dBm, respectively.

Download Full-text

Design of Low Voltage Low Power LPF for WSN Node

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.760-762.54 ◽

2013 ◽

Vol 760-762 ◽

pp. 54-59

Author(s):

Yang Lin ◽

Zhi Qun Li ◽

Chen Jian Wu ◽

Meng Zhang ◽

Zeng Qi Wang

Keyword(s):

Low Power ◽

Low Voltage ◽

Frequency Tuning ◽

Cmos Technology ◽

Pass Band ◽

Automatic Frequency ◽

Temperature Deviation ◽

Op Amp ◽

Active Rc Filter ◽

Operation Amplifier

A fourth-order low-pass continuous-time filter for a WSN transmitter is presented. The active RC filter was chosen for the high linearity, designed by using the leapfrog topology imitates the passive filter. The operation amplifier (op-amp) adopted by the filter is feed-forward operation amplifier, which could get the GBW as large as possible under the low power consumption. The cut-off frequency deviation due to the process corner, aging and temperature deviation is adjusted by an automatic frequency tuning circuit. The filter in a 0.18μm RF CMOS technology consumes 1mW from a 1V power supply. The measured results of the chip show that the bandwidth is about 1.5MHz. The voltage gain of filter is about-4.5dB with the buffer, the ripple in the pass-band is lower than 0.5 dB, and the channel rejection ratio is larger than 30dB at 4MHz.

Download Full-text