An Efficient Numerical Technique for Thermal Characterization of Printed Wiring Boards

1993 ◽  
Vol 115 (4) ◽  
pp. 366-372 ◽  
Author(s):  
G. G. Stefani ◽  
N. S. Goel ◽  
D. B. Jenks
Keyword(s):  
Numerical Technique ◽  
Thermal Characterization ◽  
Computer Time ◽  
Printed Wiring Boards ◽  
Printed Wiring Board ◽  
Equivalent Parameter ◽  
Finite Element Package ◽  
Multiple Materials ◽  
Wiring Board

Thermal modeling of Surface Mount Technology (SMT) microelectronics packages is difficult due to the complexity of the printed wiring board (PWB) plates through hole (PTH) structure. A simple, yet powerful finite difference based approach, called EPIC (Equivalent Parameter for Interfacial Cells), for modelling complex 2-D and 3-D geometries with multiple materials is used to model the PTH structure. A technique for computing an effective thermal conductivity for the PWB is presented. The results compare favorably with those from a commercially available finite element package but require far less computer time.

Effective Thermal Conductivity of Six Sigma’s Copper Reinforced Column Grid Array Interconnect for Ceramic Microelectronic Packages

2010 ◽  
Author(s):  
Mark Eblen
Keyword(s):  
Thermal Conductivity ◽  
Integrated Circuits ◽  
Effective Thermal Conductivity ◽  
Flip Chip ◽  
Heat Removal ◽  
Thermal Design ◽  
Printed Wiring Board ◽  
Wiring Board ◽  
High Lead

Thermal management of flip chip style integrated circuits often relies on thermal conduction through the ceramic package and high lead solder grid array leads into the printed wiring board as the primary path for heat removal. Thermal analysis of this package configuration requires accurate characterization of the sometimes geometrically complex package-to-board interface. Given the unique structure of the Six Sigma column grid array (CGA) interconnect, a detailed finite element submodel was used to numerically derive the effective thermal conductivity with comparisons to a conventional CGA interconnect. Once an effective thermal conductivity value is obtained, the entire interconnect layer can be represented as a fictitious cuboid layer for inclusion in a more traditional “closed-form” thermal resistance calculation. This method allows the package designer a quick and robust method to evaluate initial thermal design study tradeoffs.

Thermal Evaluation of High-Current Polyimide Rigid and Rigid-Flex Printed Wiring Board Trace Widths in a Vacuum

2013 ◽  
Vol 2013 (1) ◽  
pp. 000964-000969
Author(s):  
Bennion Cannon ◽  
Frank Friedl ◽  
Gary Gisler
Keyword(s):  
Thermal Imaging ◽  
Hot Spots ◽  
Test Results ◽  
High Current ◽  
Printed Wiring Boards ◽  
Printed Wiring Board ◽  
Thermal Imaging Camera ◽  
Industry Standards ◽  
Imaging Camera ◽  
Wiring Board

This paper details the thermal evaluation of high-current polyimide rigid and rigid-flex printed wiring boards in a vacuum. Although industry standards, such as IPC-2152 or MIL-STD-275, can be used to determine required trace width for PWB traces that carry current to between 20 or 30 amps for multiple copper plane thicknesses, they typically cannot be used to determine trace width for PWB traces that handle current greater than 15 amps. This paper presents results from testing and analysis of high-current rigid and rigid-flex PWBS that must carry current of up to 60 amps. Testing was performed in vacuum on a controlled-temperature platen, measuring board temperature at specific locations to determine performance of different trace widths using 2 and 4 ounce copper layers. A thermal imaging camera was used to identify PWB hot spots. Test results were compared to IPC-2152 standards, extrapolated to 60 amps current.

Impact of printed wiring board coatings on the reliability of lead-free chip-scale package interconnections

2004 ◽  
Vol 19 (11) ◽  
pp. 3214-3223 ◽  
Author(s):  
T.T. Mattila ◽  
V. Vuorinen ◽  
J.K. Kivilahti
Keyword(s):  
Grain Boundaries ◽  
Lead Free ◽  
Solder Paste ◽  
Printed Wiring Boards ◽  
Printed Wiring Board ◽  
Snagcu Solder ◽  
Chip Scale Package ◽  
Free Solder ◽  
Wiring Board ◽  
Reliability Performance

When lead-free solder alloys mix with lead-free component and board metallizations during reflow soldering, the solder interconnections become multicomponent alloy systems whose microstructures cannot be predicted on the basis of the SnPb metallurgy. To better understand the influences of these microstructures on the reliability of lead-free electronics assemblies, SnAgCu-bumped components were reflow-soldered with near-eutectic SnAgCu solder pastes on Ni(P)|m.Au- and organic solderability preservative (OSP)-coated printed wiring boards and tested under cyclic thermal shock loading conditions. The reliability performance under thermomechanical loading was found to be controlled by the kinetics of recrystallization. Because ductile fracturing of the as-soldered tin-rich colonies would require a great amount of plastic work, the formation of continuous network of grain boundaries by recrystallization is needed for cracks to nucleate and propagate intergranularly through the solder interconnections. Detailed microstructural observations revealed that cracks nucleate and grow along the grain boundaries especially between the recrystallized part and the non-recrystallized part of the interconnections. The thermal cycling test data were analyzed statistically by combining the Weibull statistics and the analysis of variance. The interconnections on Ni(P)|m.Au were found out to be more reliable than those on Cu|m.OSP. This is due to the extensive dissolution of Cu conductor, in the case of the Cu|m.OSP assemblies, into molten solder that makes the microstructure to differ noticeably from that of the Ni(P)|m.Au interconnections. Because of large primary Cu6Sn5 particles, the Cu-enriched interconnections enhance the onset of recrystallization, and cracking of the interconnections is therefore faster. The solder paste composition had no statistically significant effect on the reliability performance.

Recent Advances in Oxide Glass Fiber Science

2001 ◽  
Vol 702 ◽  
Author(s):  
Ernest L. Lawton ◽  
Frederick T. Wallenberger ◽  
Hong Li
Keyword(s):  
High Speed ◽  
Rapid Development ◽  
Dissipation Factor ◽  
Oxide Glass ◽  
Electronic Systems ◽  
Printed Wiring Boards ◽  
Printed Wiring Board ◽  
Fiber Glass ◽  
Lower Dielectric Constant ◽  
Wiring Board

ABSTRACTThe predominate substrate for multilayer printed wiring boards is laminate constructed from epoxy resin reinforced with fiber glass fabrics. This combination of materials dominates the segment of the electronics market where dimensional stability of the substrate is critical. The rapid development of high speed digital and analog electronic systems has challenged the predominance of fiber glass as the reinforcement of choice. As systems move to the GHz frequency range, there is a need for lower dielectric constant of the substrate to insure integrity and speed of signals. A lower dissipation factor of the substrate is desired for the wireless communication applications of printed wiring boards. A review is presented of materials competing as substrates for the high speed application of the printed wiring board market.

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